R4F24268NVFQV Renesas Electronics America, R4F24268NVFQV Datasheet - Page 881

MCU 256K FLASH 48K 144-LQFP

R4F24268NVFQV

Manufacturer Part Number
R4F24268NVFQV
Description
MCU 256K FLASH 48K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheet

Specifications of R4F24268NVFQV

Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R4F24268NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
R4F24268NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
H8S/2426, H8S/2426R, H8S/2424 Group
Notes: 1. Includes switching from low to stop, and from stop to low.
13.8.6
If 16-bit counter mode and compare match count mode are specified at the same time, input clocks
for TCNT_0 and TCNT_1 are not generated, and the counter stops. Do not specify 16-bit counter
and compare match count modes simultaneously.
13.8.7
Operation of the TMR can be disabled or enabled using the module stop control register. The
initial setting is for operation of the TMR to be halted. Register access is enabled by clearing the
module stop state. For details, refer to section 23, Power-Down Modes.
13.8.8
If a transition is made to the module stop state when an interrupt has been requested, it will not be
possible to clear the CPU interrupt source or the DTC and DMAC activation source. Interrupts
should therefore be disabled before entering the module stop state.
REJ09B0466-0350 Rev. 3.50
Jul 09, 2010
No.
4
Timing of Switchover
by Means of Modifying
CKS1, CKS0, ICKS1,
and ICKS0 Bits
to high
Switching from high
2. Includes switching from stop to high.
3. Includes switching from high to stop.
4. Generated on the assumption that the switchover is a falling edge; TCNT is
Mode Setting with Cascaded Connection
Module Stop Function Setting
Interrupts in Module Stop State
incremented.
TCNT Clock Operation
Clock before
switchover
Clock after
switchover
TCNT clock
TCNT
N
N + 1
Section 13 8-Bit Timers (TMR)
CKS bit write
N + 2
Page 851 of 1372

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