DF2148ATE20 Renesas Electronics America, DF2148ATE20 Datasheet - Page 23

• Manufacturer Part Number: DF2148ATE20
• Description: IC H8S MCU FLASH 128K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2148ATE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: Host Interface, I²C, IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2148ATE20; HD64F2148ATE20

Item
A.1 Instruction
Table A.1 Instruction
Set
A.2 Instruction Codes
Table A.2 Instruction
Codes
Page
930
933
939
949
Revision (See Manual for Details)
Table A.1 amended
2. Arithmetic Instructions
Table A.1 amended
4. Shift Instructions
Table A.1 amended
6. Branch Instructions
Table A.2 amended
EXTU
TAS
SHLR
JMP
BSR
JSR
RTS
LDC
Instruc-
tion
EXTU.W Rd
EXTU.L ERd
TAS @ERd
SHLR.B Rd
SHLR.B #2,Rd
SHLR.W Rd
SHLR.W #2,Rd
SHLR.L ERd
SHLR.L #2,ERd
JMP @ERn
JMP @aa:24
JMP @@aa:8
BSR d:8
BSR d:16
JSR @ERn
JSR @aa:24
JSR @@aa:8
RTS
Mnemonic
Mnemonic
Mnemonic
LDC @aa:16,CCR
LDC @aa:16,EXR
Mnemonic
*3
—
—
—
—
—
—
—
—
—
W
W
W
L
B
B
B
L
L
Size
Instruction Length (Bytes)
Instruction Length (Bytes)
Instruction Length (Bytes)
W
W
Addressing Mode and
Addressing Mode and
Addressing Mode and
2
2
2
2
2
2
2
2
2
2
4
1st Byte
0
0
Rev. 4.00 Sep 27, 2006 page xxi of xliv
1
1
4
4
2
4
2nd Byte
4
4
2
2
2
0
0
@ERd-0
(<bit 7> of @ERd)
PC ERn
PC aa:24
PC @aa:8
PC @-SP,PC PC+d:8
PC @-SP,PC PC+d:16
PC @-SP,PC ERn
PC @-SP,PC aa:24
PC @-SP,PC @aa:8
PC @SP+
0
0
1
(<bits 15 to 8> of Rd16)
(<bits 31 to 16> of ERd32)
MSB
3rd Byte
6
6
CCR set, (1)
Operation
Operation
Operation
B
B
4th Byte
0
0
LSB
0
0
C
— — 0
— — 0
— —
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
I
I
I
Condition Code
Condition Code
Condition Code
5th Byte
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Instruction Format
H N Z V C
H N Z V C
H N Z V C
—
—
—
—
—
—
—
—
—
0
0
0
0
0
0
—
—
—
—
—
—
—
—
—
abs
abs
—
—
—
—
—
—
—
—
—
0
0
0
0
0
0
0
0
0
—
—
—
—
—
—
—
—
—
—
—
—
6th Byte
States *
States *
States *
No. of
No. of
No. of
4
3
4
3
4
4
4
1
1
4
1
1
1
1
1
1
2
3
5
4
5
4
5
6
5
1
1
1