DF2148ATE20 Renesas Electronics America, DF2148ATE20 Datasheet - Page 442

IC H8S MCU FLASH 128K 100-QFP

DF2148ATE20

Manufacturer Part Number
DF2148ATE20
Description
IC H8S MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2148ATE20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
Host Interface, I²C, IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2148ATE20
HD64F2148ATE20

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2148ATE20IV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
DF2148ATE20IV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 13 Timer Connection
13.3.4
By using the timer connection FRT, even if there is a part of the IHI signal with twice the
frequency, this can be eliminated. In order for this function to operate properly, the duty cycle of
the IHI signal must be approximately 30% or less, or approximately 70% or above.
The 8-bit OCRDM contents or twice the OCRDM contents can be added automatically to the data
captured in ICRD in the FRT, and compare-matches generated at these points. The interval
between the two compare-matches is called a mask interval. A value equivalent to approximately
1/3 the IHI signal period is written in OCRDM. ICRD is set so that capture is performed on the
rise of the IHI signal.
Since the IHI signal supplied to the IHO signal selection circuit is normally set on the rise of the
IHI signal and reset on the fall, its waveform is the same as that of the original IHI signal. When
2fH modification is selected, IHI signal edge detection is disabled during mask intervals. Capture
is also disabled during these intervals.
Examples of FRT TCR settings are shown in table 13.6, and the 2fH modification timing chart is
shown in figure 13.6.
Rev. 4.00 Sep 27, 2006 page 396 of 1130
REJ09B0327-0400
IHI Signal and 2fH Modification
IVI signal
IHI signal
divided
waveform
Figure 13.5 Timing Chart for Measurement of IVI Signal and
FRC
ICRB
ICRB(1)
IHI Signal Divided Waveform Periods
ICRB(2)
ICRB(3)
ICRB(4)

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