DF2148ATE20 Renesas Electronics America, DF2148ATE20 Datasheet - Page 260

• Manufacturer Part Number: DF2148ATE20
• Description: IC H8S MCU FLASH 128K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2148ATE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: Host Interface, I²C, IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F2148ATE20; HD64F2148ATE20

Section 8 I/O Ports
Table 8.2
Port 1
Port 2
Port 3
Port 4
Rev. 4.00 Sep 27, 2006 page 214 of 1130
REJ09B0327-0400
Port
• 8-bit I/O port
• Built-in MOS
• LED drive
• 8-bit I/O port
• Built-in MOS
• LED drive
• 8-bit I/O port
• Built-in MOS
• LED drive
• 8-bit I/O port P47/PWX1
Description
input pull-
ups
capability
input pull-
ups
capability
input pull-
ups
capability
H8S/2147N Port Functions
P17 to P10/
A7 to A0/
PW7 to PW0
P27/A15/PW15
P26/A14/PW14
P25/A13/PW13
P24/A12/PW12
P23/A11/PW11
P22/A10/PW10
P21/A9/PW9
P20/A8/PW8
P37 to P30/
HDB7 to HDB0/
D15 to D8
P46/PWX0
P45/TMRI1/
HIRQ12
P44/TMO1/
HIRQ1
P43/TMCI1/
HIRQ11
P42/TMRI0/
SCK2/SDA1
P41/TMO0/
RxD2/IrRxD
P40/TMCI0/
TxD2/IrTxD
Pins
Lower address
output
(A7 to A0)
Upper address
output
(A15 to A8)
Data bus input/output (D15 to D8)
I/O port also functioning as 14-bit
PWM timer output (PWX1, PWX0),
8-bit timer 0 and 1 input/output
(TMCI0, TMRI0, TMO0, TMCI1,
TMRI1, TMO1), SCI2 input/output
(TxD2, RxD2, SCK2), IrDA interface
input/output (IrTxD, IrRxD), and I
bus interface 1 (option) input/output
(SDA1)
Mode 1
Expanded Modes
When DDR = 0
(after reset): input
port
When DDR = 1:
lower address
output (A7 to A0) or
PWM timer output
(PW7 to PW0)
When DDR = 0
(after reset): input
port
When DDR = 1:
upper address
output (A15 to A8),
PWM timer output
(PW15 to PW8), or
output ports (P27 to
P24)
Mode 2, Mode 3
(EXPE = 1)
2
C
I/O port also functioning as
PWM timer output (PW7 to
PW0)
I/O port also functioning as
PWM timer output (PW15
to PW8)
I/O port also functioning as
host interface data bus
input/output (HDB7 to
HDB0)
I/O port also functioning as
14-bit PWM timer output
(PWX1, PWX0), 8-bit timer
0 and 1 input/output
(TMCI0, TMRI0, TMO0,
TMCI1, TMRI1, TMO1),
host interface host CPU
interrupt request output
(HIRQ12, HIRQ1,
HIRQ11), SCI2 input/
output (TxD2, RxD2,
SCK2), IrDA interface
input/output (IrTxD, IrRxD),
and I
(option) input/output
(SDA1)
Single-Chip Mode
2
Mode 2, Mode 3
C bus interface 1
(EXPE = 0)