UPSD3433E-40U6 STMicroelectronics, UPSD3433E-40U6 Datasheet - Page 234

• Manufacturer Part Number: UPSD3433E-40U6
• Description: MCU 8BIT 8032 128KB FLASH 80TQFP
• Manufacturer: STMicroelectronics
• Series: µPSDr

Specifications of UPSD3433E-40U6

• Core Processor: 8032
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 46
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• For Use With: 497-5518 - EVAL BOARD RFID READER497-5218 - KIT DEVELOPMENT FOR UPSD3400497-2381 - CABLE PROGRAMMER FLASH LINK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: 497-4907

PSD module
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pins, and change the output state of I/O pins by accessing the Data In, Direction, and Data
Out csiop registers respectively at run-time.
To implement MCU I/O mode, each desired pin is specified in PSDsoft Express as MCU I/O
function and given a pin name. Then 8032 firmware is written to set the Direction bit for each
corresponding pin during initialization routines (0 = In, 1 = Out of the chip), then the 8032
firmware simply reads the corresponding Data In register to determine the state of an I/O
pin, or writes to a Data Out register to set the state of a pin. The Direction of each pin may
be changed dynamically by the 8032 if desired. A mixture of input and output pins within a
single port is allowed.
signal paths.
The Data In registers are defined in
defined in
Table 186
Table 178. MCU I/O mode port A data in register
1. Port A not available on 52-pin UPSD34xx devices.
2. For each bit, 1 = current state of input pin is logic '1,' 0 = current state is logic ’0’.
Table 179. MCU I/O mode port B data in register (address = csiop + offset 01h)
1. For each bit, 1 = current state of input pin is logic '1,' 0 = current state is logic ’0’.
Table 180. MCU I/O mode port C data in register (address = csiop + offset 10h)
1. X = Not guaranteed value, can be read either '1' or '0.'
2. For each bit, 1 = current state of input pin is logic '1,' 0 = current state is logic ’0’
Table 181. MCU I/O mode port D Data in register (address = csiop + offset 11h)
1. X = Not guaranteed value, can be read either '1' or '0.'
2. For each bit, 1 = current state of input pin is logic '1,' 0 = current state is logic ’0’
3. Not available on 52-pin UPSD34xx devices.
Table 182. MCU I/O mode port A data out register
1. Port A not available on 52-pin UPSD34xx devices.
2. For each bit, 1 = drive port pin to logic '1,' 0 = drive port pin to logic ’0’.
3. Default state of register is 00h after reset or power-up.
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
PC7
PB7
PA7
PA7
X
to
Table 182
Table 189 on page
04h)
Bit 6
Bit 6
Bit 6
Bit 6
Bit 6
PB6
PA6
PA6
X
X
(2)(3)
to
Figure 79 on page 232
Table 185 on page
Bit 5
Bit 5
Bit 5
Bit 5
Bit 5
PB5
PA5
PA5
X
X
236.
Table 178
Bit 4
Bit 4
Bit 4
Bit 4
Bit 4
PC4
PB4
PA4
PA4
X
UPSD3422, UPSD3433, UPSD3434, UPSD3454
235. The Direction registers are defined in
shows the Data In, Data Out, and Direction
to
Table
Bit 3
Bit 3
Bit 3
Bit 3
Bit 3
PC3
PB3
PA3
PA3
X
(1)
(1)
181. The Data Out registers are
(address = csiop + offset 00h)
(address = csiop + offset
PD2
Bit 2
Bit 2
Bit 2
Bit 2
Bit 2
PC2
PB2
PA2
PA2
(3)
Bit 1
Bit 1
Bit 1
Bit 1
Bit 1
PD1
PB1
PA1
PA1
X
Bit 0
Bit 0
Bit 0
Bit 0
Bit 0
PB0
PA0
PA0
(1)
(1) (2)
X
X
(1) (2)
(2)