HPIXF1104BE.B1-994579 Cortina Systems Inc, HPIXF1104BE.B1-994579 Datasheet - Page 119

• Manufacturer Part Number: HPIXF1104BE.B1-994579
• Description: IC ETH MAC SPI3 4PORT 552-BGA
• Manufacturer: Cortina Systems Inc

Specifications of HPIXF1104BE.B1-994579

• Controller Type: Ethernet Controller, MAC
• Interface: SPI-3
• Voltage - Supply: 1.2V, 2.5V, 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 575-BCBGA Exposed Pad (552 Bumps)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Other names: 1008-1020

IXF1104 MAC
Datasheet
278757, Revision 13.2
17 September 2008
5.10.2
Table 37
5.10.3
5.10.4
5.10.5
5.11
Cortina Systems
Instruction Register and Supported Instructions
The instruction register is a 4-bit register that enacts the boundary scan instructions. After
the state machine resets, the default instruction is IDCODE. The decode logic in the TAP
controller selects the appropriate data register and configures the boundary scan cells for
the current instruction.
Instruction Register Description
ID Register
The ID register is a 32-bit register. The IDCODE instruction connects this register between
TDI and TDO. See
Boundary Scan Register
The Boundary Scan register is a shift register made up of all the boundary scan cells
associated with the device signals. The number, type, and order of the boundary scan cells
are specified in the IXF1104 MAC BSDL file. The EXTEST and SAMPLE instructions
connect this register between TDI and TDO.
Bypass Register
The Bypass register is a 1-bit register that bypasses the IXF1104 MAC to reduce the JTAG
chain length when accessing other devices on the chain besides the IXF1104 MAC. The
BYPASS, HIGHZ, and CLAMP instructions connect this register between TDI and TDO.
Loopback Modes
The IXF1104 MAC provides two loopback modes for device diagnostic testing when it has
been integrated into a user system. A line-side loopback allows the line-side receive
interface to be looped back to the transmit line-side interface. A SPI3 loopback mode allows
the SPI3 transmit interface to be looped back to the SPI3 receive interface.
The IXF1104 MAC line-side and SPI3 loopback modes are effective diagnostic tools for
validation of system level connectivity and interface compatibility.
In loopback-mode operation, the data path is internally redirected to allow for the data flow
return path. Redirection requires the data path to circumvent resources that are required
during normal traffic flow. For example, while operating in SPI3 loopback mode, the data
path does not pass through the MAC or TX FIFO and those resource features are not used.
The result is a possible degradation of throughput performance and statistical data
accuracy. Cortina recommends that loopback modes be used for diagnostic purposes only.
®
IXF1104 4-Port Gigabit Ethernet Media Access Controller
Instruction
BYPASS
SAMPLE
EXTEST
IDCODE
CLAMP
HIGHZ
Table 111, JTAG ID ($0x50C), on page 184
Table 37
Code
0000
0001
0101
0110
0111
1111
shows the supported boundary-scan instructions.
Description
1-bit Bypass
External Test
Sample Boundary
ID Code Inspection
Float Boundary
Clamp Boundary
for detailed information.
Data Register
Bypass
Boundary Scan
Boundary Scan
ID
Bypass
Bypass
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