HPIXF1104BE.B1-994579 Cortina Systems Inc, HPIXF1104BE.B1-994579 Datasheet - Page 72

• Manufacturer Part Number: HPIXF1104BE.B1-994579
• Description: IC ETH MAC SPI3 4PORT 552-BGA
• Manufacturer: Cortina Systems Inc

Specifications of HPIXF1104BE.B1-994579

• Controller Type: Ethernet Controller, MAC
• Interface: SPI-3
• Voltage - Supply: 1.2V, 2.5V, 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 575-BCBGA Exposed Pad (552 Bumps)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Other names: 1008-1020

IXF1104 MAC
Datasheet
278757, Revision 13.2
17 September 2008
5.1.3.1
Note:
5.1.3.2
Table 23
Cortina Systems
The IXF1104 MAC provides complete flexibility in line-side connectivity by offering RGMII,
integrated SerDes, and GMII.
Configuration
The memory maps
through
split into the following two distinct regions:
To achieve a desired configuration for a given port, the relevant per-port registers must be
configured correctly by the user. The
affect the operation of all ports, such as the SPI3 interface configuration.
See
configuration and status registers. The Register Maps
summary of important configuration registers.
The initialization sequence provided in
Sequence, on page 124
Key Configuration Registers
The following key registers select the operational mode of a given port:
Operational Mode Configuration Registers (Sheet 1 of 2)
®
Desired Duplex
($ Port_Index +
0x02)
MAC IF Mode
and RGMII
Speed ($
Port_Index +
0x10)
Note:
Register Name
• Per-Port Registers
• Global Registers
IXF1104 4-Port Gigabit Ethernet Media Access Controller
Section 8.0, Register Set, on page 148
The initialization sequence provided in
page 124
Table 68, Optical Module Registers ($ 0x799 - 0x79F), on page
must be followed for proper configuration of the IXF1104 MAC.
0x002 – Port 0
0x082 – Port 1
0x102 – Port 2
0x182 – Port 3
0x010 – Port 0
0x090 – Port 1
0x110 – Port 2
0x190 – Port 3
Register
Address
(Table 58, MAC Control Registers ($ Port Index + Offset), on page 149
must be followed for proper configuration of the IXF1104 MAC.
The
full-duplex or half-duplex operation.
Note:
The
and mode for a given port.
Note:
Table 70 on page 156
Table 81 on page 159
Table 58
Half-duplex operation is only valid for 10/100 speeds where the
RGMII line interface has been selected.
Set the
the register value. This ensures that a change in the MAC
clock frequency is controlled correctly. If the
Interface Mode Change Enable Ports 0 - 3 ($0x794)
used correctly, the IXF1104 MAC may not be configured to the
proper mode.
Section 6.1, Change Port Mode Initialization Sequence, on
Section 6.1, Change Port Mode Initialization
for a complete description of IXF1104 MAC
Table 151 on page 210
through
defines whether a port is to be configured for
determines the MAC operational frequency
(Table 58
Table 68
Description
through
to 0x0 prior to any change in
also contain registers that
Table
155) are logically
Clock and
68) present a
is not
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