HPIXF1104BE.B1-994579 Cortina Systems Inc, HPIXF1104BE.B1-994579 Datasheet - Page 97
HPIXF1104BE.B1-994579
Manufacturer Part Number
HPIXF1104BE.B1-994579
Description
IC ETH MAC SPI3 4PORT 552-BGA
Manufacturer
Cortina Systems Inc
Specifications of HPIXF1104BE.B1-994579
Controller Type
Ethernet Controller, MAC
Interface
SPI-3
Voltage - Supply
1.2V, 2.5V, 3.3V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
575-BCBGA Exposed Pad (552 Bumps)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Other names
1008-1020
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IXF1104 MAC
Datasheet
278757, Revision 13.2
17 September 2008
5.5.6
5.5.7
Cortina Systems
Figure 21
Single MDI Command Operation
The Management Data Interface is accessed through the
and the
setting Register 0, bit 20 to logic 1, and is automatically cleared when the frame is
completed.
The Write data is first set up in Register 1, bits 15:0 for Write operation. Register 0 is
initialized with the appropriate control information (start, op code, etc.) and Register 0, bit 20
is set to logic 1. Register 0, bit 20 is reset to logic 0 when the frame is complete.
The steps are identical for Read operation except that in Register 1, bits 15:0, the data is
ignored. The data received from the MDIO is read by the CPU interface from Register 1, bits
31:16.
MDI State Machine
The MDI State Machine sequences the information sent to it by the MDIO control registers
and keeps track of the current sequence bit count, enabling or disabling the MDIO driver
output (see
®
IXF1104 4-Port Gigabit Ethernet Media Access Controller
MDIO Single Read and Write Data
Figure
Management Frame Structure (Single-Frame Format)
22.
Preamble
32 Bits
First Bit Transmitte
2 Bits
Start
Op Code
2 Bits
($0x681). A single management frame is sent by
d
PHY Addr
5 Bits
REG Addr
MDIO Single Command ($0x680)
5 Bits
Last Bit Transmitte
Turnaround
2 Bits
16 Bits
Data
d
Page 97
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