HPIXF1104BE.B1-994579 Cortina Systems Inc, HPIXF1104BE.B1-994579 Datasheet - Page 201

• Manufacturer Part Number: HPIXF1104BE.B1-994579
• Description: IC ETH MAC SPI3 4PORT 552-BGA
• Manufacturer: Cortina Systems Inc

Specifications of HPIXF1104BE.B1-994579

• Controller Type: Ethernet Controller, MAC
• Interface: SPI-3
• Voltage - Supply: 1.2V, 2.5V, 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 575-BCBGA Exposed Pad (552 Bumps)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Other names: 1008-1020

IXF1104 MAC
Datasheet
278757, Revision 13.2
17 September 2008
Table 139
Table 140
8.4.8
Table 141
Cortina Systems
TX FIFO Occupancy Counter for Ports 0 - 3 ($0x62D – 0x630) (Sheet 2 of 2)
TX FIFO Port Drop Enable ($0x63D)
MDIO Register Overview
Table 141
MDIO Single Command ($0x680) (Sheet 1 of 2)
®
Occupancy for Tx
FIFO Port 2
Occupancy for Tx
FIFO Port 3
1. RO = Read Only, No clear on Read; R = Read, Clear on Read; W = Write only; R/W = Read/Write, No
Register Description: Independently enables the individual TX FIFOs to drop erroneous
packets.
1. RO = Read Only, No clear on Read; R = Read, Clear on Read; W = Write only; R/W = Read/Write, No clear;
Register Description: Gives the CPU the ability to perform single MDIO read and write
accesses to the external PHY for ports that are configured in copper mode.
1. RO = Read Only, No clear on Read; R = Read, Clear on Read; W = Write only; R/W = Read/Write, No
31:21
19:18
17:16
15:10
Bit
31:4
IXF1104 4-Port Gigabit Ethernet Media Access Controller
20
Bit
3
2
1
0
clear; R/W/C = Read/Write, Clear on Write
R/W/C = Read/Write, Clear on Write
clear; R/W/C = Read/Write, Clear on Write
Name
Reserved
MDIO Command
Reserved
OP Code
Reserved
Name
Reserved
Port 3 Drop
Port 2 Drop
Port 1 Drop
Port 0 Drop
through
Table 144
This register gives the Occupancy for TX FIFO
Port 2. This is a Read only register
This register gives the Occupancy for TX FIFO
Port 3. This is a Read only register
Description
0 = Disable the TXFIFO from dropping erroneous packets
1 = Enable the TXFIFO to drop erroneous packets
0 = Disable the TXFIFO from dropping erroneous packets
1 = Enable the TXFIFO to drop erroneous packets
0 = Disable the TXFIFO from dropping erroneous packets
1 = Enable the TXFIFO to drop erroneous packets
0 = Disable the TXFIFO from dropping erroneous packets
1 = Enable the TXFIFO to drop erroneous packets
Reserved
Reserved
Reserved
Description
Performs the MDIO operation. Cleared when
done.
0 = MDIO ready, operation complete
1 = Perform operation
Reserved
MDIO Op Code; two bits identify operation to be
performed:
00 = Reserved
01 = Write operation (as defined in IEEE 802.3,
10 = Read operation (as defined in IEEE 802.3,
11 = Reserved
provide an overview of the MDIO registers.
clause 22.2.4.5)
clause 22.2.4.5)
0x62F
0x630
Type
R/W
R/W
RO
RO
RO
R
R
Type
R/W
R/W
R/W
R/W
RO
1
00000000000
0x00010000
0x00000000
0x00000000
Default
000000
0x0000000f
0x000000
Default
00
01
0
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