HPIXF1104BE.B1-994579 Cortina Systems Inc, HPIXF1104BE.B1-994579 Datasheet - Page 159

• Manufacturer Part Number: HPIXF1104BE.B1-994579
• Description: IC ETH MAC SPI3 4PORT 552-BGA
• Manufacturer: Cortina Systems Inc

Specifications of HPIXF1104BE.B1-994579

• Controller Type: Ethernet Controller, MAC
• Interface: SPI-3
• Voltage - Supply: 1.2V, 2.5V, 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 575-BCBGA Exposed Pad (552 Bumps)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Other names: 1008-1020

IXF1104 MAC
Datasheet
278757, Revision 13.2
17 September 2008
Table 80
Table 81
Table 82
Cortina Systems
Max Frame Size (Addr: Port_Index + 0x0F)
MAC IF Mode and RGMII Speed ($ Port_Index + 0x10)
Flush TX ($ Port_Index + 0x11)
®
Max Frame Size
1. RO = Read Only, No clear on Read; R = Read, Clear on Read; W = Write only; R/W = Read/Write, No
Register Description – MAC IF Mode: Determines the MAC operation frequency and mode
per port.
Changes to the data setting of this register must be made in conjunction with the
Interface Mode Change Enable Ports 0 - 3 ($0x794)
operational mode. Changes to this register must follow a proper sequence. Refer to
6.1, Change Port Mode Initialization Sequence, on page 124
changing the port mode and speed.
1. RO = Read Only, No clear on Read; R = Read, Clear on Read; W = Write only; R/W = Read/Write, No
Register Description: Used to flush all TX data. It is used if all traffic sent to a port should be
stopped.
1. RO = Read Only, No clear on Read; R = Read, Clear on Read; W = Write only; R/W = Read/Write, No
31:3
31:1
Bit
2:0
Bit
IXF1104 4-Port Gigabit Ethernet Media Access Controller
0
clear; R/W/C = Read/Write, Clear on Write
clear; R/W/C = Read/Write, Clear on Write
clear; R/W/C = Read/Write, Clear on Write
Name
Name
Reserved
Port Mode
Name
Reserved
Flush TX
This is a 14-bit value configuring the maximum
frame size the MAC can receive or transmit
without activating any error counters, and
without truncation.
This value is excluding the 4-byte CRC in the
transmit direction when CRC append is
enabled in the MAC. Hence, this value has to
be set four bytes less when CRC append is
enabled in the MAC.
The maximum frame size is internally adjusted
by +4 if the frame is VLAN tagged.
Reserved
These bits are used to define the clock mode and
the RGMII/GMII mode of operation.
000 =Reserved
001 =Reserved
010 = GMII 1000 Mbps operation
011 = Reserved
100 = RGMII 10 Mbps operation
101 = RGMII 100 Mbps operation
11x = RGMII 1000 Mbps operation
Reserved
Description
Description
This bit flushes all TX data and is used if all the
traffic sent to a port should be stopped.
Description
to ensure a safe transition to a new
for the proper sequence for
Port_Inde
Address
x + 0x0F
Clock and
Section
Type
R/W
Type
Type
R/W
R/W
R
R
1
1
1
0x000005EE
0x00000003
0x00000000
0x00000000
0x00000000
Default
Default
Default
011
0
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