A3PN125-ZVQG100 Actel, A3PN125-ZVQG100 Datasheet - Page 3

FPGA - Field Programmable Gate Array 125K System Gates ProASIC3 nano


Manufacturer Part Number
FPGA - Field Programmable Gate Array 125K System Gates ProASIC3 nano

Specifications of A3PN125-ZVQG100

Processor Series
IP Core
Number Of Macrocells
Maximum Operating Frequency
350 MHz
Number Of Programmable I/os
Data Ram Size
36 Kbit
Delay Time
1.02 ns
Supply Voltage (max)
3.3 V
Supply Current
2 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
- 20 C
Development Tools By Supplier
AGLN-Nano-Kit, AGLN-Z-Nano-Kit, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FloasPro 4, FlashPro 3, FlashPro Lite
Mounting Style
Supply Voltage (min)
1.5 V
Number Of Gates
125 K
Package / Case
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ProASIC3 nano Ordering Information
Device Marking
Actel normally topside marks the full ordering part number on each device. There are some exceptions to this, such as some of the
Z feature grade nano devices, the V2 designator for IGLOO devices, and packages where space is physically limited. Packages that
have limited characters available are UC36, UC81, CS81, QN48, QN68, and QFN132. On these specific packages, a subset of the
device marking will be used that includes the required legal information and as much of the part number as allowed by character
limitation of the device. In this case, devices will have a truncated device marking and may exclude the applications markings, such
as the I designator for Industrial Devices or the ES designator for Engineering Samples.
*For the A3PN060, A3PN125, and A3PN250, the Z feature grade does not support the enhanced nano features of Schmitt
trigger input, cold-sparing, and hot-swap I/O capability. The A3PN030 Z feature grade does not support Schmitt trigger input.
For the VQ100, CS81, UC81, QN68, and QN48 packages, the Z feature grade and the N part number are not marked on the
Part Number
ProASIC3 nano Devices
A3PN010 = 10,000 System Gates
A3PN015 = 15,000 System Gates
A3PN020 = 20,000 System Gates
A3PN030 = 30,000 System Gates
A3PN060 = 60,000 System Gates
A3PN125 = 125,000 System Gates
A3PN250 = 250,000 System Gates
Feature Grade
Blank = Standard
Z = nano devices without enhanced features
Speed Grade
Blank = Standard
1 = 15% Faster than Standard
2 = 25% Faster than Standard
Package Type
DIELOT = Known Good Die
QN = Quad Flat Pack No Leads (0.4 mm and 0.5 mm pitches)
VQ = Very Thin Quad Flat Pack (0.5 mm pitch)
Lead-Free Packaging
Blank = Standard Packaging
G= RoHS-Compliant Packaging
R e visi on 8
Package Lead Count
Application (Temperature Range)
Blank = Commercial (
PP = Pre-Production
ES = Engineering Sample (Room Temperature Only)
I = Industrial (
40°C to +85°C Ambient Temperature)
20°C to +70°C Ambient Temperature)
ProASIC3 nano Flash FPGAs

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