A3PN125-ZVQG100 Actel, A3PN125-ZVQG100 Datasheet - Page 45

FPGA - Field Programmable Gate Array 125K System Gates ProASIC3 nano

A3PN125-ZVQG100

Manufacturer Part Number
A3PN125-ZVQG100
Description
FPGA - Field Programmable Gate Array 125K System Gates ProASIC3 nano
Manufacturer
Actel
Datasheet

Specifications of A3PN125-ZVQG100

Processor Series
A3PN125
Core
IP Core
Number Of Macrocells
1024
Maximum Operating Frequency
350 MHz
Number Of Programmable I/os
71
Data Ram Size
36 Kbit
Delay Time
1.02 ns
Supply Voltage (max)
3.3 V
Supply Current
2 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
- 20 C
Development Tools By Supplier
AGLN-Nano-Kit, AGLN-Z-Nano-Kit, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FloasPro 4, FlashPro 3, FlashPro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
1.5 V
Number Of Gates
125 K
Package / Case
VQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 2-40 • 2.5 V LVCMOS Low Slew
Table 2-41 • 2.5 V LVCMOS High Slew
Drive
Strength
2 mA
4 mA
6 mA
8 mA
Note:
Drive
Strength
2 mA
4 mA
6 mA
8 mA
Notes:
1. Software default selection highlighted in gray.
2. For specific junction temperature and voltage supply levels, refer to
For specific junction temperature and voltage supply levels, refer to
Commercial-Case Conditions: T
Software Default Load at 35 pF for A3PN060, A3PN125, A3PN250
Commercial-Case Conditions: T
Software Default Load at 35 pF for A3PN060, A3PN125, A3PN250
Timing Characteristics
Speed
Speed
Grade
Grade
Std.
Std.
Std.
Std.
Std.
Std.
Std.
Std.
–1
–2
–1
–2
–1
–2
–1
–2
–1
–2
–1
–2
–1
–2
–1
–2
t
t
DOUT
0.60
0.51
0.45
0.60
0.51
0.45
0.60
0.51
0.45
0.60
0.51
0.45
DOUT
0.60
0.51
0.45
0.60
0.51
0.45
0.60
0.51
0.45
0.60
0.51
0.45
11.29
11.29
9.61
8.43
9.61
8.43
7.73
6.57
5.77
7.73
6.57
5.77
8.38
7.13
6.26
8.38
7.13
6.26
4.94
4.20
3.69
4.94
4.20
3.69
t
t
DP
DP
0.04
0.04
0.03
0.04
0.04
0.03
0.04
0.04
0.03
0.04
0.04
0.03
0.04
0.04
0.03
0.04
0.04
0.03
0.04
0.04
0.03
0.04
0.04
0.03
t
t
J
J
DIN
DIN
= 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 2.3 V
= 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 2.3 V
1.43
1.22
1.07
1.43
1.22
1.07
1.43
1.22
1.07
1.43
1.22
1.07
1.43
1.22
1.07
1.43
1.22
1.07
1.43
1.22
1.07
1.43
1.22
1.07
t
t
PY
PY
R e v i s i o n 8
t
1.63
1.39
1.22
1.63
1.39
1.22
1.63
1.39
1.22
1.63
1.39
1.22
t
1.63
1.39
1.22
1.63
1.39
1.22
1.63
1.39
1.22
1.63
1.39
1.22
PYS
PYS
Table 2-6 on page 2-5
t
t
EOUT
0.43
0.36
0.32
0.43
0.36
0.32
0.43
0.36
0.32
0.43
0.36
0.32
EOUT
0.43
0.36
0.32
0.43
0.36
0.32
0.43
0.36
0.32
0.43
0.36
0.32
Table 2-6 on page 2-5
10.64
10.64
9.05
7.94
9.05
7.94
7.70
6.55
5.75
7.70
6.55
5.75
7.36
6.26
5.50
7.36
6.26
5.50
4.71
4.01
3.52
4.71
4.01
3.52
t
t
ZL
ZL
11.29
11.29
9.61
8.43
9.61
8.43
7.73
6.57
5.77
7.73
6.57
5.77
8.38
7.13
6.26
8.38
7.13
6.26
4.94
4.20
3.69
4.94
4.20
3.69
t
t
ZH
ZH
for derating values.
ProASIC3 nano Flash FPGAs
2.27
1.93
1.70
2.27
1.93
1.70
2.60
2.21
1.94
2.60
2.21
1.94
2.27
1.93
1.69
2.27
1.93
1.69
2.60
2.21
1.94
2.60
2.21
1.94
t
t
LZ
LZ
for derating values.
2.29
1.95
1.71
2.29
1.95
1.71
2.89
2.46
2.16
2.89
2.46
2.16
2.37
2.02
1.77
2.37
2.02
1.77
2.98
2.54
2.23
2.98
2.54
2.23
t
t
HZ
HZ
Units
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2- 31

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