A3PN125-ZVQG100 Actel, A3PN125-ZVQG100 Datasheet - Page 9

FPGA - Field Programmable Gate Array 125K System Gates ProASIC3 nano

A3PN125-ZVQG100

Manufacturer Part Number
A3PN125-ZVQG100
Description
FPGA - Field Programmable Gate Array 125K System Gates ProASIC3 nano
Manufacturer
Actel
Datasheet

Specifications of A3PN125-ZVQG100

Processor Series
A3PN125
Core
IP Core
Number Of Macrocells
1024
Maximum Operating Frequency
350 MHz
Number Of Programmable I/os
71
Data Ram Size
36 Kbit
Delay Time
1.02 ns
Supply Voltage (max)
3.3 V
Supply Current
2 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
- 20 C
Development Tools By Supplier
AGLN-Nano-Kit, AGLN-Z-Nano-Kit, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FloasPro 4, FlashPro 3, FlashPro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
1.5 V
Number Of Gates
125 K
Package / Case
VQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Note:
Figure 1-1 • ProASIC3 Device Architecture Overview with Two I/O Banks and No RAM
Figure 1-2 • ProASIC3 nano Architecture Overview with Three I/O Banks and No RAM (A3PN015 and
*Bank 0 for the A3PN030 device
(A3PN010 and A3PN030)
A3PN020)
Dedicated FlashROM
Dedicated SRAM/FIFO memory
Extensive CCCs and PLLs
Advanced I/O structure
User Nonvolatile FlashROM
User Nonvolatile FlashROM
Bank 1*
Bank 1
Bank 1
Bank 1
R e v i s i o n 8
Charge Pumps
Charge Pumps
ProASIC3 nano Flash FPGAs
I/Os
I/Os
VersaTile
CCC-GL
VersaTile
CCC-GL
1 -3

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