A3PN125-ZVQG100 Actel, A3PN125-ZVQG100 Datasheet - Page 39

FPGA - Field Programmable Gate Array 125K System Gates ProASIC3 nano

A3PN125-ZVQG100

Manufacturer Part Number
A3PN125-ZVQG100
Description
FPGA - Field Programmable Gate Array 125K System Gates ProASIC3 nano
Manufacturer
Actel
Datasheet

Specifications of A3PN125-ZVQG100

Processor Series
A3PN125
Core
IP Core
Number Of Macrocells
1024
Maximum Operating Frequency
350 MHz
Number Of Programmable I/os
71
Data Ram Size
36 Kbit
Delay Time
1.02 ns
Supply Voltage (max)
3.3 V
Supply Current
2 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
- 20 C
Development Tools By Supplier
AGLN-Nano-Kit, AGLN-Z-Nano-Kit, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FloasPro 4, FlashPro 3, FlashPro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
1.5 V
Number Of Gates
125 K
Package / Case
VQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 2-33 • Minimum and Maximum DC Input and Output Levels for 3.3 V LVCMOS Wide Range
3.3 V LVCMOS
Wide Range
Drive Strength
100 µA
100 µA
100 µA
100 µA
Notes:
1. I
2. I
3. Note that 3.3 V LVCMOS wide range is applicable to 100 µA drive strength only. The configuration will not operate at the
4. Currents are measured at 85°C junction temperature.
5. All LVMCOS 3.3 V software macros support LVCMOS 3.3 V Wide Range, as specified in the JESD8-B specification.
6. Software default selection highlighted in gray.
larger when operating outside recommended ranges.
equivalent software default drive strength. These values are for normal ranges only.
IL
IH
is the input leakage current per I/O pin over recommended operation conditions where –0.3 V < VIN < VIL.
is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI. Input current is
3.3 V LVCMOS Wide Range
Equivalent
Software
Strength
Option
Default
Drive
2 mA
4 mA
6 mA
8 mA
3
Min.
–0.3
–0.3
–0.3
–0.3
V
VIL
Max.
0.8
0.8
0.8
0.8
V
Min.
V
2
2
2
2
VIH
R e v i s i o n 8
Max.
3.6
3.6
3.6
3.6
V
Max.
VOL
0.2
0.2
0.2
0.2
V
VDD – 0.2
VDD – 0.2
VDD – 0.2
VDD – 0.2
VOH
Min.
V
ProASIC3 nano Flash FPGAs
mA
100 100
100 100
100 100
100 100
I
OL
mA
I
OH
µA
I
IL
10
10
10
10
1
4
I
µA
IH
10
10
10
10
2- 25
2
4

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