HD64F36077GHV Renesas Electronics America, HD64F36077GHV Datasheet - Page 144

• Manufacturer Part Number: HD64F36077GHV
• Description: 16BIT MCU FLASH 56K, SMD, LQFP64
• Manufacturer: Renesas Electronics America

Specifications of HD64F36077GHV

• No. Of I/o's: 47
• Ram Memory Size: 4KB
• Cpu Speed: 20MHz
• No. Of Timers: 4
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 4.5V
• Core Size: 16bit
• Program Memory Size: 56KB
• Oscillator Type: External Only
• Controller Family/series: H8/300H
• Peripherals: ADC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Section 7 ROM
8. The maximum number of repetitions of the program/program-verify sequence of the same bit
Rev. 1.00 Sep. 16, 2005 Page 114 of 490
REJ09B0216-0100
is 1,000.
Note: *The RTS instruction must not be used during the following 1. and 2. periods.
Wait (Wait time=programming time)
Write pulse application subroutine
1. A period between 128-byte data programming to flash memory and the P bit clearing
2. A period between dummy writing of H'FF to a verify address and verify data reading
Clear PSU bit in FLMCR1
Set PSU bit in FLMCR1
Clear P bit in FLMCR1
Set P bit in FLMCR1
Apply Write Pulse
WDT enable
Disable WDT
Wait 50 µs
Wait 5 µs
Wait 5 µs
End Sub
Figure 7.3 Program/Program-Verify Flowchart
*
Increment address
Successively write 128-byte data from additional-
programming data area in RAM to flash memory
No
Additional-programming data computation
Store 128-byte program data in program
data area consecutively to flash memory
Write 128-byte data in RAM reprogram
H'FF dummy write to verify address
data area and reprogram data area
Clear SWE bit in FLMCR1
Set block start address as
Reprogram data computation
data verification completed?
Set SWE bit in FLMCR1
Clear PV bit in FLMCR1
Set PV bit in FLMCR1
Apply Write Pulse
End of programming
Apply
Read verify data
verify address
Yes
Yes
Wait 100 µs
Verify data =
write data?
Wait 1 µs
Wait 4 µs
Wait 2 µs
Yes
Wait 2 µs
128-byte
START
m= 0 ?
n
n
m= 0
n= 1
Write pulse
≤
≤
6 ?
6?
Yes
Yes
Sub-Routine-Call
No
No
No
No
*
m = 1
Clear SWE bit in FLMCR1
Programming failure
Wait 100 µs
n ≤ 1000 ?
No
Yes
n ← n + 1