HD64F36077GHV Renesas Electronics America, HD64F36077GHV Datasheet - Page 149
![16BIT MCU FLASH 56K, SMD, LQFP64](/photos/19/6/190684/ge64qfp05-40_sml.jpg)
HD64F36077GHV
Manufacturer Part Number
HD64F36077GHV
Description
16BIT MCU FLASH 56K, SMD, LQFP64
Manufacturer
Renesas Electronics America
Datasheet
1.HD64F36077GHV.pdf
(524 pages)
Specifications of HD64F36077GHV
No. Of I/o's
47
Ram Memory Size
4KB
Cpu Speed
20MHz
No. Of Timers
4
Digital Ic Case Style
LQFP
Supply Voltage Range
4.5V
Core Size
16bit
Program Memory Size
56KB
Oscillator Type
External Only
Controller Family/series
H8/300H
Peripherals
ADC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD64F36077GHV
Manufacturer:
RENESAS
Quantity:
340
Part Number:
HD64F36077GHV
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
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The FLMCR1, FLMCR2, and EBR1 settings are retained, however program mode or erase mode
is aborted at the point at which the error occurred. Program mode or erase mode cannot be re-
entered by re-setting the P or E bit. However, PV and EV bit settings are retained, and a transition
can be made to verify mode. Error protection can be cleared only by a reset.
7.6
In programmer mode, a PROM programmer can be used to perform programming/erasing via a
socket adapter, just as a discrete flash memory. Use a PROM programmer that supports the MCU
device type with the on-chip 64-kbyte flash memory (FZTAT64V5).
7.7
In user mode, the flash memory will operate in either of the following states:
• Normal operating mode
• Power-down operating mode
• Standby mode
Table 7.7 shows the correspondence between the operating modes of this LSI and the flash
memory. In subactive mode, the flash memory can be set to operate in power-down mode with the
PDWND bit in FLPWCR. When the flash memory returns to its normal operating state from
power-down mode or standby mode, a period to stabilize operation of the power supply circuits
that were stopped is needed. When the flash memory returns to its normal operating state, bits
STS2 to STS0 in SYSCR1 must be set to provide a wait time of at least 20 µs, even when the
external clock is being used.
The flash memory can be read and written to at high speed.
The power supply circuit of flash memory can be partly halted. As a result, flash memory can
be read with low power consumption.
All flash memory circuits are halted.
Programmer Mode
Power-Down States for Flash Memory
Rev. 1.00 Sep. 16, 2005 Page 119 of 490
REJ09B0216-0100
Section 7 ROM
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