HD64F36077GHV Renesas Electronics America, HD64F36077GHV Datasheet - Page 39
![16BIT MCU FLASH 56K, SMD, LQFP64](/photos/19/6/190684/ge64qfp05-40_sml.jpg)
HD64F36077GHV
Manufacturer Part Number
HD64F36077GHV
Description
16BIT MCU FLASH 56K, SMD, LQFP64
Manufacturer
Renesas Electronics America
Datasheet
1.HD64F36077GHV.pdf
(524 pages)
Specifications of HD64F36077GHV
No. Of I/o's
47
Ram Memory Size
4KB
Cpu Speed
20MHz
No. Of Timers
4
Digital Ic Case Style
LQFP
Supply Voltage Range
4.5V
Core Size
16bit
Program Memory Size
56KB
Oscillator Type
External Only
Controller Family/series
H8/300H
Peripherals
ADC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD64F36077GHV
Manufacturer:
RENESAS
Quantity:
340
Part Number:
HD64F36077GHV
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
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- Download datasheet (4Mb)
This LSI has an H8/300H CPU with an internal 32-bit architecture that is upward-compatible with
the H8/300CPU, and supports only normal mode, which has a 64-kbyte address space.
• Upward-compatible with H8/300 CPUs
• General-register architecture
• Sixty-two basic instructions
• Eight addressing modes
• 64-kbyte address space
• High-speed operation
CPU30H2C_000120030300
Can execute H8/300 CPUs object programs
Additional eight 16-bit extended registers
32-bit transfer and arithmetic and logic instructions are added
Signed multiply and divide instructions are added.
Sixteen 16-bit general registers also usable as sixteen 8-bit registers and eight 16-bit
8/16/32-bit data transfer and arithmetic and logic instructions
Multiply and divide instructions
Powerful bit-manipulation instructions
Register direct [Rn]
Register indirect [@ERn]
Register indirect with displacement [@(d:16,ERn) or @(d:24,ERn)]
Register indirect with post-increment or pre-decrement [@ERn+ or @–ERn]
Absolute address [@aa:8, @aa:16, @aa:24]
Immediate [#xx:8, #xx:16, or #xx:32]
Program-counter relative [@(d:8,PC) or @(d:16,PC)]
Memory indirect [@@aa:8]
All frequently-used instructions execute in one or two states
8/16/32-bit register-register add/subtract
8 × 8-bit register-register multiply
16 ÷ 8-bit register-register divide
16 × 16-bit register-register multiply : 22 states
32 ÷ 16-bit register-register divide
registers, or eight 32-bit registers
Section 2 CPU
: 14 states
: 14 states
: 22 states
: 2 state
Rev. 1.00 Sep. 16, 2005 Page 9 of 490
REJ09B0216-0100
Section 2 CPU
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