HD64F36077GHV Renesas Electronics America, HD64F36077GHV Datasheet - Page 361

16BIT MCU FLASH 56K, SMD, LQFP64

HD64F36077GHV

Manufacturer Part Number
HD64F36077GHV
Description
16BIT MCU FLASH 56K, SMD, LQFP64
Manufacturer
Renesas Electronics America
Datasheet

Specifications of HD64F36077GHV

No. Of I/o's
47
Ram Memory Size
4KB
Cpu Speed
20MHz
No. Of Timers
4
Digital Ic Case Style
LQFP
Supply Voltage Range
4.5V
Core Size
16bit
Program Memory Size
56KB
Oscillator Type
External Only
Controller Family/series
H8/300H
Peripherals
ADC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F36077GHV
Manufacturer:
RENESAS
Quantity:
340
Part Number:
HD64F36077GHV
Manufacturer:
Renesas
Quantity:
200
Part Number:
HD64F36077GHV
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Bit
6
5
4
3
Bit Name
TEIE
RIE
NAKIE
STIE
0
Initial
Value
0
0
0
R/W
R/W
R/W
R/W
R/W
Description
Transmit End Interrupt Enable
This bit enables or disables the transmit end interrupt
(TEI) at the rising of the ninth clock while the TDRE bit in
ICSR is 1. TEI can be canceled by clearing the TEND bit
or the TEIE bit to 0.
0: Transmit end interrupt request (TEI) is disabled.
1: Transmit end interrupt request (TEI) is enabled.
Receive Interrupt Enable
This bit enables or disables the receive data full interrupt
request (RXI) and the overrun error interrupt request
(ERI) with the clock synchronous format, when a receive
data is transferred from ICDRS to ICDRR and the RDRF
bit in ICSR is set to 1. RXI can be canceled by clearing
the RDRF or RIE bit to 0.
0: Receive data full interrupt request (RXI) and overrun
1: Receive data full interrupt request (RXI) and overrun
NACK Receive Interrupt Enable
This bit enables or disables the NACK receive interrupt
request (NAKI) and the overrun error (setting of the OVE
bit in ICSR) interrupt request (ERI) with the clock
synchronous format, when the NACKF and AL bits in
ICSR are set to 1. NAKI can be canceled by clearing the
NACKF, OVE, or NAKIE bit to 0.
0: NACK receive interrupt request (NAKI) is disabled.
1: NACK receive interrupt request (NAKI) is enabled.
Stop Condition Detection Interrupt Enable
0: Stop condition detection interrupt request (STPI) is
1: Stop condition detection interrupt request (STPI) is
error interrupt request (ERI) with the clock
synchronous format are disabled.
error interrupt request (ERI) with the clock
synchronous format are enabled.
disabled.
enabled.
Rev. 1.00 Sep. 16, 2005 Page 331 of 490
Section 17 I
2
C Bus Interface 2 (IIC2)
REJ09B0216-0100

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