HD64F36077GHV Renesas Electronics America, HD64F36077GHV Datasheet - Page 357

• Manufacturer Part Number: HD64F36077GHV
• Description: 16BIT MCU FLASH 56K, SMD, LQFP64
• Manufacturer: Renesas Electronics America

Specifications of HD64F36077GHV

• No. Of I/o's: 47
• Ram Memory Size: 4KB
• Cpu Speed: 20MHz
• No. Of Timers: 4
• Digital Ic Case Style: LQFP
• Supply Voltage Range: 4.5V
• Core Size: 16bit
• Program Memory Size: 56KB
• Oscillator Type: External Only
• Controller Family/series: H8/300H
• Peripherals: ADC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

17.3.2
ICCR1 issues start/stop conditions, manipulates the SDA pin, monitors the SCL pin, and controls
reset in the control part of the I
Bit
7
6
5
Bit Name
BBSY
SCP
SDAO
I
2
C Bus Control Register 2 (ICCR2)
Initial
Value
0
1
1
2
C bus interface 2.
R/W
R/W
W
R/W
Description
Bus Busy
This bit enables to confirm whether the I
occupied or released and to issue start/stop conditions in
master mode. With the clock synchronous serial format,
this bit has no meaning. With the I
set to 1 when the SDA level changes from high to low
under the condition of SCL = high, assuming that the start
condition has been issued. This bit is cleared to 0 when
the SDA level changes from low to high under the
condition of SCL = high, assuming that the stop condition
has been issued. Write 1 to BBSY and 0 to SCP to issue
a start condition. Follow this procedure when also re-
transmitting a start condition. Write 0 in BBSY and 0 in
SCP to issue a stop condition. To issue start/stop
conditions, use the MOV instruction.
Start/Stop Issue Condition Disable
The SCP bit controls the issue of start/stop conditions in
master mode.
To issue a start condition, write 1 in BBSY and 0 in SCP.
A retransmit start condition is issued in the same way. To
issue a stop condition, write 0 in BBSY and 0 in SCP.
This bit is always read as 1. If 1 is written, the data is not
stored.
SDA Output Value Control
This bit is used with SDAOP when modifying output level
of SDA. This bit should not be manipulated during
transfer.
0: When reading, SDA pin outputs low.
1: When reading, SDA pin outputs high.
When writing, SDA pin is changed to output low.
When writing, SDA pin is changed to output Hi-Z
(outputs high by external pull-up resistance).
Rev. 1.00 Sep. 16, 2005 Page 327 of 490
Section 17 I
2
C bus format, this bit is
2
C Bus Interface 2 (IIC2)
2
C bus is
REJ09B0216-0100