PIC18C801-I/L Microchip Technology, PIC18C801-I/L Datasheet - Page 252

IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LDCC,84PIN,PLASTIC

PIC18C801-I/L

Manufacturer Part Number
PIC18C801-I/L
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LDCC,84PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Cr

Specifications of PIC18C801-I/L

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
37
Program Memory Type
ROMless
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
84-PLCC
Processor Series
PIC18C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
3-Wire, I2C, SPI, USART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
47
Number Of Timers
1 x 16 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
DV164005, ICE4000, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164310 - MODULE SKT FOR PM3 84PLCCXLT84L1 - SOCKET TRANSITION ICE 84PLCCAC174012 - MODULE SKT PROMATEII 84PLCC
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details
Other names
PIC18C801-I/LR
PIC18C801-I/LR
PIC18C801I/L

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18C801-I/L
Manufacturer:
MICROCHIP
Quantity:
12 000
Part Number:
PIC18C801-I/L
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18C601/801
SUBWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
DS39541A-page 252
Decode
Q1
register ’f’
Subtract WREG from f
[ label ] SUBWF f [,d [,a]]
0
d
a
(f) – (WREG)
N,OV, C, DC, Z
Subtract WREG from register 'f'
(2’s complement method). If 'd' is 0,
the result is stored in WREG. If 'd'
is 1, the result is stored back in reg-
ister 'f' (default). If ’a’ is 0, the
Access Bank will be selected, over-
riding the BSR value. If ’a’ is 1, the
Bank will be selected as per the
BSR value.
1
1
Read
Q2
0101
f
[0,1]
[0,1]
255
11da
Process
Data
Q3
dest
ffff
destination
Advance Information
Write to
Q4
ffff
SUBWF (Cont.)
Example 1:
Example 2:
Example 3:
Before Instruction
After Instruction
Before Instruction
After Instruction
Before Instruction
After Instruction
REG
WREG
C
REG
WREG
C
Z
N
REG
WREG
C
REG
WREG
C
Z
N
REG
WREG
C
REG
WREG
C
Z
N
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
SUBWF
SUBWF
SUBWF
3
2
?
1
2
1
0
0
2
2
?
2
0
1
1
0
1
2
?
0FFh ;(2’s complement)
2
0
0
1
2001 Microchip Technology Inc.
; result is positive
; result is zero
; result is negative
REG
REG, W
REG

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