LAN9311I-NZW Standard Microsystem (Smsc), LAN9311I-NZW Datasheet - Page 131

• Manufacturer Part Number: LAN9311I-NZW
• Manufacturer: Standard Microsystem (Smsc)

Specifications of LAN9311I-NZW

• Package: 128XVTQFP
• Phy/transceiver Interface: MII
• Number Of Primary Switch Ports: 2
• Maximum Data Rate: 100 Mbps
• Internal Memory Buffer Size: 32 KB
• Vlan Support: Yes
• Power Supply Type: Analog
• Minimum Single Supply Voltage: 3 V
• Maximum Single Supply Voltage: 3.6 V
• Maximum Supply Current: 0.295 A
• Maximum Power Dissipation: 1070 mW

Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9311/LAN9311i
9.8.6.2
TX Command 'A'
Buffer End Alignment = 0
Data Start Offset = 6
First Segment = 1
Last Segment = 1
Buffer Size =183
TX Command 'B'
Packet Length = 183
TX Example 2
In this example, a single 183-Byte Ethernet packet will be transmitted. This packet is in a single buffer
as follows:
Figure 9.6
to the TX Data FIFO. Note that the packet resides in a single TX Buffer, therefore both the FS and LS
bits are set in TX command ‘A’.
2-Byte “Data Start Offset”
183-Bytes of payload data
4-Byte “Buffer End Alignment”
illustrates the TX command structure for this example, and also shows how data is passed
31
Data Written to the
TX Data FIFO Port
6-Byte Data Start Offset
183-Byte Payload Data
Memory Mapped
TX Command 'A'
TX Command 'B'
3B End Padding
Figure 9.6 TX Example 2
DATASHEET
131
0
NOTE: Extra bytes between buffers
are not transmitted
Data Passed to the
183-Byte Payload Data
TX Data FIFO
TX Command 'A'
TX Command 'B'
Revision 1.7 (06-29-10)