LAN9311I-NZW Standard Microsystem (Smsc), LAN9311I-NZW Datasheet - Page 221

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LAN9311I-NZW

Manufacturer Part Number
LAN9311I-NZW
Description
Manufacturer
Standard Microsystem (Smsc)
Datasheet

Specifications of LAN9311I-NZW

Package
128XVTQFP
Phy/transceiver Interface
MII
Number Of Primary Switch Ports
2
Maximum Data Rate
100 Mbps
Internal Memory Buffer Size
32 KB
Vlan Support
Yes
Power Supply Type
Analog
Minimum Single Supply Voltage
3 V
Maximum Single Supply Voltage
3.6 V
Maximum Supply Current
0.295 A
Maximum Power Dissipation
1070 mW

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Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9311/LAN9311i
14.2.5.20
31:16
BITS
15:0
RESERVED
Auxiliary MAC Address High (AUX_MAC_HI)
This field contains the high 16-bits of the Auxiliary MAC address used for
PTP packet detection.
1588 Auxiliary MAC Address High-WORD Register (1588_AUX_MAC_HI)
This read/write register combined with the
(1588_AUX_MAC_LO)
address can be enabled for each port of the LAN9311/LAN9311i via their respective User Defined MAC
Address Enable bit in the
1588 Hardware Time Stamp Unit," on page 155
Offset:
forms the 48-bit Auxiliary (user defined) MAC address. The Auxiliary MAC
18Ch
1588 Configuration Register
DESCRIPTION
DATASHEET
221
1588 Auxiliary MAC Address Low-DWORD Register
Size:
for additional information.
(1588_CONFIG). Refer to
32 bits
TYPE
R/W
RO
Revision 1.7 (06-29-10)
Chapter 11, "IEEE
DEFAULT
0000h
-

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