LAN9311I-NZW Standard Microsystem (Smsc), LAN9311I-NZW Datasheet - Page 347

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LAN9311I-NZW

Manufacturer Part Number
LAN9311I-NZW
Description
Manufacturer
Standard Microsystem (Smsc)
Datasheet

Specifications of LAN9311I-NZW

Package
128XVTQFP
Phy/transceiver Interface
MII
Number Of Primary Switch Ports
2
Maximum Data Rate
100 Mbps
Internal Memory Buffer Size
32 KB
Vlan Support
Yes
Power Supply Type
Analog
Minimum Single Supply Voltage
3 V
Maximum Single Supply Voltage
3.6 V
Maximum Supply Current
0.295 A
Maximum Power Dissipation
1070 mW

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Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9311/LAN9311i
14.5.2.24
31:18
17:16
BITS
15:0
RESERVED
Backoff Reset RX/TX
Half duplex-only. Determines when the truncated binary exponential backoff
attempts counter is reset.
00 = Reset on successful transmission (IEEE standard)
01 = Reset on successful reception
1X = Reset on either successful transmission or reception
Pause Time Value
The value that is inserted into the transmitted pause packet when the switch
wants to “XOFF” its link partner.
Port x MAC Transmit Flow Control Settings Register (MAC_TX_FC_SETTINGS_x)
This read/write register configures the flow control settings of the port.
Register #:
Port0: 0441h
Port1: 0841h
Port2: 0C41h
DESCRIPTION
DATASHEET
347
Size:
32 bits
TYPE
R/W
R/W
RO
Revision 1.7 (06-29-10)
DEFAULT
FFFFh
00b
-

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