LAN9311I-NZW Standard Microsystem (Smsc), LAN9311I-NZW Datasheet - Page 50

• Manufacturer Part Number: LAN9311I-NZW
• Manufacturer: Standard Microsystem (Smsc)

Specifications of LAN9311I-NZW

• Package: 128XVTQFP
• Phy/transceiver Interface: MII
• Number Of Primary Switch Ports: 2
• Maximum Data Rate: 100 Mbps
• Internal Memory Buffer Size: 32 KB
• Vlan Support: Yes
• Power Supply Type: Analog
• Minimum Single Supply Voltage: 3 V
• Maximum Single Supply Voltage: 3.6 V
• Maximum Supply Current: 0.295 A
• Maximum Power Dissipation: 1070 mW

Revision 1.7 (06-29-10)
Top Level Interrupt Registers
Bit 28 (SWITCH_INT)
Bit 29 (1588_EVNT)
of INT_STS register
of INT_STS register
of INT_STS register
of INT_STS register
of INT_STS register
of INT_STS register
Bit 27 (PHY_INT2)
Bit 26 (PHY_INT1)
Bit 17 (PME_INT)
(System CSRs)
Bit 12 (GPIO)
Figure 5.1 Functional Interrupt Register Hierarchy
INT_CFG
INT_STS
INT_EN
Power Management Control Register
1588 Time Stamp Interrupt Register
Switch Fabric Interrupt Registers
Port 2 PHY Interrupt Registers
Port 1 PHY Interrupt Registers
PHY_INTERRUPT_SOURCE_2
PHY_INTERRUPT_SOURCE_1
PHY_INTERRUPT_MASK_2
PHY_INTERRUPT_MASK_1
GPIO Interrupt Register
DATASHEET
Bits [2,1,0] (MAC_[2,1,MII])
GPIO_INT_STS_EN
1588_INT_STS_EN
of SW_IPR register
of SW_IPR register
of SW_IPR register
PMT_CTRL
SW_IMR
SW_IPR
Bit 5 (SWE)
Bit 6 (BM)
50
Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Port [2,1,0] MAC Interrupt Registers
Buffer Manager Interrupt Registers
Switch Engine Interrupt Registers
MAC_IMR_[2,1,MII]
MAC_IPR_[2,1,MII]
SWE_IMR
SWE_IPR
BM_IMR
BM_IPR
SMSC LAN9311/LAN9311i
Datasheet