LAN9311I-NZW Standard Microsystem (Smsc), LAN9311I-NZW Datasheet - Page 369
LAN9311I-NZW
Manufacturer Part Number
LAN9311I-NZW
Description
Manufacturer
Standard Microsystem (Smsc)
Datasheet
1.LAN9311-NU.pdf
(460 pages)
Specifications of LAN9311I-NZW
Package
128XVTQFP
Phy/transceiver Interface
MII
Number Of Primary Switch Ports
2
Maximum Data Rate
100 Mbps
Internal Memory Buffer Size
32 KB
Vlan Support
Yes
Power Supply Type
Analog
Minimum Single Supply Voltage
3 V
Maximum Single Supply Voltage
3.6 V
Maximum Supply Current
0.295 A
Maximum Power Dissipation
1070 mW
Available stocks
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Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9311/LAN9311i
14.5.3.2
BITS
31:0
MAC Address
This field contains the first 32 bits of the ALR entry that will be written into
the ALR table. These bits correspond to the first 32 bits of the MAC address.
Bit 0 holds the LSB of the first byte (the multicast bit).
Switch Engine ALR Write Data 0 Register (SWE_ALR_WR_DAT_0)
This register is used in conjunction with the
(SWE_ALR_WR_DAT_1)
Entry command in the
Register #:
Switch Engine ALR Command Register
and contains the first 32 bits of ALR data to be manually written via the Make
1801h
DESCRIPTION
DATASHEET
369
Size:
Switch Engine ALR Write Data 1 Register
32 bits
(SWE_ALR_CMD).
TYPE
R/W
Revision 1.7 (06-29-10)
00000000h
DEFAULT
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