LAN9311I-NZW Standard Microsystem (Smsc), LAN9311I-NZW Datasheet - Page 209

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LAN9311I-NZW

Manufacturer Part Number
LAN9311I-NZW
Description
Manufacturer
Standard Microsystem (Smsc)
Datasheet

Specifications of LAN9311I-NZW

Package
128XVTQFP
Phy/transceiver Interface
MII
Number Of Primary Switch Ports
2
Maximum Data Rate
100 Mbps
Internal Memory Buffer Size
32 KB
Vlan Support
Yes
Power Supply Type
Analog
Minimum Single Supply Voltage
3 V
Maximum Single Supply Voltage
3.6 V
Maximum Supply Current
0.295 A
Maximum Power Dissipation
1070 mW

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Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9311/LAN9311i
14.2.5.8
BITS
31:0
Source UUID Low (SRC_UUID_TX_LO)
This field contains the low 32-bits of the Source UUID from the 1588 Sync
or Delay_Req packet.
Port x 1588 Source UUID Low-DWORD Transmit Capture Register
(1588_SRC_UUID_LO_TX_CAPTURE_x)
Note: The selection between Sync or Delay_Req packets is based on the corresponding
Note: There are multiple instantiations of this register, one for each port of the LAN9311/LAN9311i.
Note: For Port 0(Host MAC), receive is defined as data from the switch fabric, while transmit is to
master/slave bit in the
Refer to
the switch fabric.
Offset:
Section 14.2.5
Port 1: 11Ch
Port 2: 13Ch
Port 0: 15Ch
DESCRIPTION
1588 Configuration Register
for additional information.
DATASHEET
209
Size:
(1588_CONFIG).
32 bits
TYPE
RO
Revision 1.7 (06-29-10)
00000000h
DEFAULT

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