LAN9311I-NZW Standard Microsystem (Smsc), LAN9311I-NZW Datasheet - Page 149

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LAN9311I-NZW

Manufacturer Part Number
LAN9311I-NZW
Description
Manufacturer
Standard Microsystem (Smsc)
Datasheet

Specifications of LAN9311I-NZW

Package
128XVTQFP
Phy/transceiver Interface
MII
Number Of Primary Switch Ports
2
Maximum Data Rate
100 Mbps
Internal Memory Buffer Size
32 KB
Vlan Support
Yes
Power Supply Type
Analog
Minimum Single Supply Voltage
3 V
Maximum Single Supply Voltage
3.6 V
Maximum Supply Current
0.295 A
Maximum Power Dissipation
1070 mW

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Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9311/LAN9311i
10.2.3.7
10.2.3.8
EECLK
EECLK
EEDO
EEDO
EECS
EECS
EEDI
EEDI
WRITE (Write Location)
If erase/write operations are enabled in the EEPROM, this command will cause the contents of the
EEPROM Data Register (E2P_DATA)
EPC_ADDRESS field of the
EEPROM Command Register (E2P_CMD)
WRAL (Write All)
If erase/write operations are enabled in the EEPROM, this command will cause the contents of the
EEPROM Data Register (E2P_DATA)
EPC_TIMEOUT bit of the
respond within 30mS.
1
1
0
0
0
1
0
Figure 10.12 EEPROM WRITE Cycle
Figure 10.13 EEPROM WRAL Cycle
Ax
EEPROM Command Register (E2P_CMD)
EEPROM Command Register
1
DATASHEET
A0
to be written to the EEPROM location pointed to by the
to be written to every EEPROM memory location. The
149
is set if the EEPROM does not respond within 30mS.
D7
D7
(E2P_CMD). The EPC_TIMEOUT bit of the
D0
D0
is set if the EEPROM does not
Revision 1.7 (06-29-10)

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