LAN9311I-NZW Standard Microsystem (Smsc), LAN9311I-NZW Datasheet - Page 244

• Manufacturer Part Number: LAN9311I-NZW
• Manufacturer: Standard Microsystem (Smsc)

Specifications of LAN9311I-NZW

• Package: 128XVTQFP
• Phy/transceiver Interface: MII
• Number Of Primary Switch Ports: 2
• Maximum Data Rate: 100 Mbps
• Internal Memory Buffer Size: 32 KB
• Vlan Support: Yes
• Power Supply Type: Analog
• Minimum Single Supply Voltage: 3 V
• Maximum Single Supply Voltage: 3.6 V
• Maximum Supply Current: 0.295 A
• Maximum Power Dissipation: 1070 mW

Revision 1.7 (06-29-10)
14.2.7
14.2.7.1
31:16
BITS
15:0
RESERVED
MII Data
This field contains the value written to the PHYs. For a write operation, this
register should be first written with the desired data.
PHY Management Interface (PMI)
The PMI registers are used (by the EEPROM Loader only) to indirectly access the PHY registers.
Refer to
information on the PHY registers.
Note: These registers are only accessible by the EEPROM Loader and NOT by the Host bus. Refer
PHY Management Interface Data Register (PMI_DATA)
This register is used in conjunction with the
(PMI_ACCESS)
Note: This register is only accessible by the EEPROM Loader and NOT by the Host bus. Refer to
to
Section 10.2.4, "EEPROM Loader," on page 150
Offset:
Section 14.4, "Ethernet PHY Control and Status Registers," on page 287
Section 10.2.4, "EEPROM Loader," on page 150
to perform write operations to the PHYs.
0A4h
EEPROM Loader
Access Only
DESCRIPTION
DATASHEET
244
Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Size:
PHY Management Interface Access Register
for additional information.
for additional information.
32 bits
TYPE
WO
SMSC LAN9311/LAN9311i
RO
for additional
00000000h
DEFAULT
Datasheet
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