CS53L21-CNZ Cirrus Logic Inc, CS53L21-CNZ Datasheet - Page 55

IC ADC STEREO 24BIT 98DB 32QFN

CS53L21-CNZ

Manufacturer Part Number
CS53L21-CNZ
Description
IC ADC STEREO 24BIT 98DB 32QFN
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CS53L21-CNZ

Package / Case
32-QFN
Number Of Converters
2
Number Of Bits
24
Sampling Rate (per Second)
100k
Data Interface
Serial
Power Dissipation (max)
30mW
Voltage Supply Source
Analog and Digital
Operating Temperature
-10°C ~ 70°C
Mounting Type
Surface Mount
Conversion Rate
96 KSPS
Resolution
24 bit
Number Of Adc Inputs
6
Operating Supply Voltage
1.8 V or 2.5 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
- 10 C
Mounting Style
SMD/SMT
Power Consumption
60 mW
Supply Voltage (max)
2.63 V
Supply Voltage (min)
1.65 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1550 - BOARD EVAL FOR CS53L21 ADC
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1191

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CS53L21-CNZR
Manufacturer:
CIRRUS
Quantity:
20 000
DS700PP1
6.17
Reserved
7
Status (Address 20h) (Read Only)
For all bits in this register, a “1” means the associated error condition has occurred at least once since the
register was last read. A ”0” means the associated error condition has NOT occurred since the last reading
of the register. Reading the register resets all bits to 0.
Serial Port Clock Error (SP_CLK Error)
Default: 0
Function:
Indicates an invalid MCLK to LRCK ratio. See
page 29
Note:
ADC Overflow (ADCX_OVFL)
Default = 0
Function:
Indicates that there is an over-range condition anywhere in the CS53L21 ADC signal path of each of the
associated ADC’s.
SP_CLKERR
for valid clock ratios.
On initial power up and application of clocks, this bit will be high as the serial port re-synchronizes.
6
Reserved
5
Reserved
4
“Serial Port Clocking” on page 29“Serial Port Clocking” on
Reserved
3
Reserved
2
ADCA_OVFL
1
CS53L21
ADCB_OVFL
0
55

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