CS53L21-CNZ Cirrus Logic Inc, CS53L21-CNZ Datasheet - Page 6

IC ADC STEREO 24BIT 98DB 32QFN

CS53L21-CNZ

Manufacturer Part Number
CS53L21-CNZ
Description
IC ADC STEREO 24BIT 98DB 32QFN
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CS53L21-CNZ

Package / Case
32-QFN
Number Of Converters
2
Number Of Bits
24
Sampling Rate (per Second)
100k
Data Interface
Serial
Power Dissipation (max)
30mW
Voltage Supply Source
Analog and Digital
Operating Temperature
-10°C ~ 70°C
Mounting Type
Surface Mount
Conversion Rate
96 KSPS
Resolution
24 bit
Number Of Adc Inputs
6
Operating Supply Voltage
1.8 V or 2.5 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
- 10 C
Mounting Style
SMD/SMT
Power Consumption
60 mW
Supply Voltage (max)
2.63 V
Supply Voltage (min)
1.65 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1550 - BOARD EVAL FOR CS53L21 ADC
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1191

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CS53L21-CNZR
Manufacturer:
CIRRUS
Quantity:
20 000
6
1. PIN DESCRIPTIONS - SOFTWARE (HARDWARE) MODE
LRCK
SDA/CDIN
(MCLKDIV2)
SCL/CCLK
(I²S/LJ)
AD0/CS
(TSTN)
VA_PULLUP
TSTO
AGND
TSTO
Pin Name
#
1
2
3
4
5
6
7
8
SDA/CDIN (MCLKDIV2)
Left Right Clock (Input/Output) - Determines which channel, Left or Right, is currently active on the
serial audio data line.
Serial Control Data (Input/Output) - SDA is a data I/O in I²C Mode. CDIN is the input data line for the
control port interface in SPI Mode.
MCLK Divide by 2 (Input) - Hardware Mode: Divides the MCLK by 2 prior to all internal circuitry.
Serial Control Port Clock (Input) - Serial clock for the serial control port.
Interface Format Selection (Input) - Hardware Mode: Selects between I²S & Left-Justified interface for-
mats for the ADC.
Address Bit 0 (I²C) / Control Port Chip Select (SPI) (Input) - AD0 is a chip address pin in I²C Mode; CS
is the chip-select signal for SPI format.
Test In (Input) - Hardware Mode: This pin is an input used for test purposes only and should be tied to
DGND for normal operation.
Reference Pull-up (Input) - This pin is an input used for test purposes only and must be pulled-up to VA
using a 47 kΩ resistor.
Test Out (Output) - This pin is an output used for test purposes only and must be left “floating” (no con-
nection external to the pin).
Analog Ground (Input) - Ground reference for the internal analog section.
Test Out (Output) - This pin is an output used for test purposes only and must be left “floating” (no con-
nection external to the pin).
SCL/CCLK (I²S/LJ)
AD0/CS (TSTN)
VA_PULLUP
AGND
TSTO
LRCK
TSTO
1
2
3
4
5
6
7
8
32
9
10
31
CS53L21
11
30
12
29
Pin Description
13
28
14
27
15
26
25
16
24
23
22
21
20
19
18
17
MICIN2/BIAS/AIN3B
AIN1B
AFILTB
AFILTA
AIN2B/BIAS
AIN2A
MICIN1/AIN3A
AIN1A
CS53L21
DS700PP1

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