CS53L21-CNZ Cirrus Logic Inc, CS53L21-CNZ Datasheet - Page 64

• Manufacturer Part Number: CS53L21-CNZ
• Description: IC ADC STEREO 24BIT 98DB 32QFN
• Manufacturer: Cirrus Logic Inc

Specifications of CS53L21-CNZ

• Package / Case: 32-QFN
• Number Of Converters: 2
• Number Of Bits: 24
• Sampling Rate (per Second): 100k
• Data Interface: Serial
• Power Dissipation (max): 30mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -10°C ~ 70°C
• Mounting Type: Surface Mount
• Conversion Rate: 96 KSPS
• Resolution: 24 bit
• Number Of Adc Inputs: 6
• Operating Supply Voltage: 1.8 V or 2.5 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: - 10 C
• Mounting Style: SMD/SMT
• Power Consumption: 60 mW
• Supply Voltage (max): 2.63 V
• Supply Voltage (min): 1.65 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1550 - BOARD EVAL FOR CS53L21 ADC
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1191

64
15.REVISION HISTORY
Revision
PP1
A1
Initial Release
Adjusted the minimum voltage specification in
Adjusted maximum “Analog In to PGA to ADC” THD+N performance specification in
(Commercial - CNZ)” on page
Corrected Interchannel Gain Mismatch specification in
and
Adjusted ADC full scale input voltage specification in
and
Removed t
Corrected Group Delay characteristic in table in section
Adjusted timing specifications t
“Switching Specifications - Serial Port” on page
Adjusted I²C timing specifications t
Modified the Typ. Conn. HW and SW figures by adding a pull-up to the VA_HP pin and changed AFILTA, B cap
values from 1000 pF to 150 pF.
Modified the Pin Descriptions table description for pin 5 to add a pull-up.
Adjusted High-Level Input Voltage specifications V
table in section
Adjusted the +20 dB Digital Boost block before the ALC feedback path in
Modified ALC Recommended Settings in section
Modified step 2 of the
Corrected default values for ALC and Limiter Release Rates shown in
Corrected default value for the SPE_SZC bits in
Corrected ADC Filter Response shown in Figures 23, 24, 25, and
Corrected ADC_SNGVOL description in
“Analog Characteristics (Automotive - DNZ)” on page
“Analog Characteristics (Automotive - DNZ)” on page
d
timing specification from table in section
“Digital Interface Specifications & Characteristics” on page
“Recommended Power-Down Sequence” on page
12.
d(MSB)
ack
from 40 ns to 52 ns and t
from 1000 ns to 3450 ns in table in section
“MIC Control (Address 05h)” on page
“Specified Operating Conditions” section on page
14.
“SPE Control (Address 09h)” on page
“Automatic Level Control (ALC)” on page
Changes
IH
“Switching Specifications - Serial Port” on page
from 0.65VL to 0.68VL and V
“Analog Characteristics (Commercial - CNZ)” on page 12
“Analog Characteristics (Commercial - CNZ)” on page 12
“ADC Digital Filter Characteristics” on page
13.
13.
s(SDO-SK)
26 on page
“Register Quick Reference” on page
from 30 ns to 20 ns in table in section
33.
Figure 7 on page
18.
60.
44.
“” on page
IL
from 0.35VL to 0.32VL in
“Analog Characteristics
48.
26.
22.
15.
11.
CS53L21
14.
DS700PP1
14.
37.