EP20K100EFC324-2 Altera, EP20K100EFC324-2 Datasheet - Page 59
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EP20K100EFC324-2
Manufacturer Part Number
EP20K100EFC324-2
Description
IC APEX 20KE FPGA 100K 324-FBGA
Manufacturer
Altera
Series
APEX-20K®r
Datasheet
1.EP20K30ETC144-3.pdf
(117 pages)
Specifications of EP20K100EFC324-2
Number Of Logic Elements/cells
4160
Number Of Labs/clbs
416
Total Ram Bits
53248
Number Of I /o
246
Number Of Gates
263000
Voltage - Supply
1.71 V ~ 1.89 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
324-FBGA
Family Name
APEX 20K
Number Of Usable Gates
100000
Number Of Logic Blocks/elements
4160
# Registers
26
# I/os (max)
246
Frequency (max)
250MHz
Process Technology
SRAM
Operating Supply Voltage (typ)
1.8V
Logic Cells
4160
Ram Bits
53248
Device System Gates
263000
Operating Supply Voltage (min)
1.71V
Operating Supply Voltage (max)
1.89V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
324
Package Type
FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP20K100EFC324-2
Manufacturer:
ALTERA
Quantity:
18
Company:
Part Number:
EP20K100EFC324-2
Manufacturer:
PANASONIC
Quantity:
86
Company:
Part Number:
EP20K100EFC324-2
Manufacturer:
ALTERA
Quantity:
25
Company:
Part Number:
EP20K100EFC324-2-3
Manufacturer:
VISHAY
Quantity:
15 000
Company:
Part Number:
EP20K100EFC324-2X
Manufacturer:
ALTERA
Quantity:
15
Altera Corporation
Operating
Conditions
Symbol
V
V
V
I
T
T
T
OUT
Table 23. APEX 20K 5.0-V Tolerant Device Absolute Maximum Ratings
STG
AMB
J
CCIO
CCINT
I
Supply voltage
DC input voltage
DC output current, per pin
Storage temperature
Ambient temperature
Junction temperature
Parameter
Figure 32. APEX 20K AC Test Conditions
Note to
(1)
Tables 23
recommended operating conditions, DC operating conditions, and
capacitance for 2.5-V APEX 20K devices.
Device
Output
Power supply transients can affect AC measurements. Simultaneous transitions of
multiple outputs should be avoided for accurate measurement. Threshold tests
must not be performed under AC conditions. Large-amplitude, fast-ground-
current transients normally occur as the device outputs discharge the load
capacitances. When these transients flow through the parasitic inductance between
the device ground pin and the test system ground, significant reductions in
observable noise immunity can result.
Figure
Device input
rise and fall
times < 3 ns
With respect to ground
No bias
Under bias
PQFP, RQFP, TQFP, and BGA packages,
under bias
Ceramic PGA packages, under bias
through
32:
APEX 20K Programmable Logic Device Family Data Sheet
26
provide information on absolute maximum ratings,
C1 (includes
JIG capacitance)
Conditions
(3)
to Test
System
Note (1)
Notes
(1),
Min
–0.5
–0.5
–2.0
–25
–65
–65
(2)
Max
5.75
150
135
135
150
3.6
4.6
25
Unit
mA
° C
° C
° C
° C
V
V
V
59