EP4SGX530HH35C2N Altera, EP4SGX530HH35C2N Datasheet - Page 683
![IC STRATIX IV FPGA 530K 1152HBGA](/photos/37/12/371227/1152pin_fbga_sml.jpg)
EP4SGX530HH35C2N
Manufacturer Part Number
EP4SGX530HH35C2N
Description
IC STRATIX IV FPGA 530K 1152HBGA
Manufacturer
Altera
Series
Stratix® IV GXr
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.EP4SGX110DF29C3N.pdf
(432 pages)
4.EP4SGX110DF29C3N.pdf
(22 pages)
5.EP4SGX110DF29C3N.pdf
(30 pages)
6.EP4SGX110DF29C3N.pdf
(72 pages)
7.EP4SGX530HH35C2N.pdf
(1145 pages)
Specifications of EP4SGX530HH35C2N
Number Of Logic Elements/cells
531200
Number Of Labs/clbs
21248
Total Ram Bits
27376
Number Of I /o
564
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-HBGA
Family Name
Stratix® IV
Number Of Logic Blocks/elements
531200
# Registers
424960
# I/os (max)
560
Process Technology
40nm
Operating Supply Voltage (typ)
900mV
Logic Cells
531200
Ram Bits
28033024
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
1152
Package Type
FCHBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- EP4SGX110DF29C3N PDF datasheet
- EP4SGX110DF29C3N PDF datasheet #2
- EP4SGX110DF29C3N PDF datasheet #3
- EP4SGX110DF29C3N PDF datasheet #4
- EP4SGX110DF29C3N PDF datasheet #5
- EP4SGX110DF29C3N PDF datasheet #6
- EP4SGX530HH35C2N PDF datasheet #7
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- Download datasheet (32Mb)
Chapter 2: Transceiver Clocking in Stratix IV Devices
FPGA Fabric PLLs-Transceiver PLLs Cascading
Figure 2–6. FPGA Fabric PLLs-Transceiver PLLs Cascading Options Allowed for 1152-Pin Package Devices
February 2011 Altera Corporation
FPGA Fabric PLLs-Transceiver PLLs Cascading in the 780-Pin Package
FPGA Fabric PLLs-Transceiver PLLs Cascading in the 1152-Pin Package
Transceiver Block GXBL1
Transceiver Block GXBL0
Channel 3
Channel 1
Channel 0
Channel 3
Channel 2
Channel 1
Channel 0
Channel 2
ATX PLL L0 (6G)
CMU1
CMU0
CMU1
CMU0
CDR
CDR
CDR
CDR
CDR
CDR
CDR
CDR
PLL
PLL
PLL
PLL
Stratix IV GX devices in 780-pin packages do not support FPGA fabric
PLLs-transceiver PLLs cascading.
Figure 2–6
in the EP4SGX110FF35 device (red), the EP4SGX230FF35, EP4SGX290FF35 and
EP4SGX360FF35 devices (blue), and the EP4SGX530HH35 device (black).
Cascade
Network
PLL
shows the FPGA fabric PLLs-Transceiver PLLs cascading options allowed
PLL_L2
EP4SGX110FF35
EP4SGX530HH35
EP4SGX230FF35
EP4SGX290FF35
EP4SGX360FF35
PLL_R2
Stratix IV Device Handbook Volume 2: Transceivers
Cascade
Network
PLL
Transceiver Block GXBR1
Transceiver Block GXBR0
ATX PLL R0 (6G)
CMU1
CMU0
CDR
CMU0
CDR
CMU1
CDR
CDR
CDR
CDR
CDR
CDR
PLL
PLL
PLL
PLL
Channel 0
Channel 3
Channel 0
Channel 3
Channel 2
Channel 1
Channel 2
Channel 1
2–11
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