XC3S100E-4TQG144I Xilinx Inc, XC3S100E-4TQG144I Datasheet - Page 40

IC FPGA SPARTAN-3E 100K 144-TQFP

XC3S100E-4TQG144I

Manufacturer Part Number
XC3S100E-4TQG144I
Description
IC FPGA SPARTAN-3E 100K 144-TQFP
Manufacturer
Xilinx Inc
Series
Spartan™-3Er
Datasheet

Specifications of XC3S100E-4TQG144I

Package / Case
144-TQFP, 144-VQFP
Mounting Type
Surface Mount
Voltage - Supply
1.1 V ~ 3.465 V
Operating Temperature
-40°C ~ 100°C
Number Of I /o
108
Number Of Logic Elements/cells
*
Number Of Gates
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XC3S100E-4TQG144I
Manufacturer:
XILINX/21
Quantity:
163
Part Number:
XC3S100E-4TQG144I
Manufacturer:
Xilinx Inc
Quantity:
10 000
Part Number:
XC3S100E-4TQG144I
Manufacturer:
XILINX
0
Part Number:
XC3S100E-4TQG144I
Manufacturer:
XILINX/赛灵思
Quantity:
20 000
There are a number of different conditions under which data
can be accessed at the DO outputs. Basic data access
always occurs when the WE input is inactive. Under this
condition, data stored in the memory location addressed by
the ADDR lines passes through a output latch to the DO
outputs. The timing for basic data access is shown in the
Table 23: WRITE_MODE Effect on Data Output Latches During Write Operations
Setting the WRITE_MODE attribute to a value of
WRITE_FIRST, data is written to the addressed memory
location on an enabled active CLK edge and is also passed
to the DO outputs. WRITE_FIRST timing is shown in the
portion of
DS312-2 (v1.1) March 21, 2005
Advance Product Specification
WRITE_FIRST
Read After Write
READ_FIRST
Read Before Write
NO_CHANGE
No Read on Write
Write Mode
Figure 30
R
Figure 30: Waveforms of Block RAM Data Operations with WRITE_FIRST Selected
during which WE is High.
Data_in
ADDR
CLK
WE
Data on DI and DIP inputs is written into
specified RAM location and simultaneously
appears on DO and DOP outputs.
Data from specified RAM location appears on
DO and DOP outputs.
Data on DI and DIP inputs is written into
specified location.
Data on DO and DOP outputs remains
unchanged.
Data on DI and DIP inputs is written into
specified location.
DO
EN
DI
DISABLED
0000
DI
Effect on Same Port
Internal
Memory
XXXX
aa
READ
MEM(aa)
DO
www.xilinx.com
1111
bb
MEM(bb)=1111
WRITE
portions of
which WE is Low.
Data also can be accessed on the DO outputs when assert-
ing the WE input based on the value of the WRITE_MODE
attribute as described in
Setting the WRITE_MODE attribute to a value of
READ_FIRST, data already stored in the addressed loca-
tion passes to the DO outputs before that location is over-
written with new data from the DI inputs on an enabled
active CLK edge. READ_FIRST timing is shown in the por-
tion of
Data_out = Data_in
1111
Figure 31
2222
cc
MEM(cc)=2222
Invalidates data on DO and DOP outputs.
Data from specified RAM location appears on
DO and DOP outputs.
Invalidates data on DO and DOP outputs.
WRITE
Figure
(dual-port only with same address)
2222
during which WE is High.
30,
Effect on Opposite Port
Table
Figure
dd
DS312-2_05_020905
XXXX
READ
MEM(dd)
23.
31, and
Functional Description
Figure 32
during
33

Related parts for XC3S100E-4TQG144I