XC3S100E-4TQG144I Xilinx Inc, XC3S100E-4TQG144I Datasheet - Page 60

• Manufacturer Part Number: XC3S100E-4TQG144I
• Description: IC FPGA SPARTAN-3E 100K 144-TQFP
• Manufacturer: Xilinx Inc
• Series: Spartan™-3Er

Specifications of XC3S100E-4TQG144I

• Package / Case: 144-TQFP, 144-VQFP
• Mounting Type: Surface Mount
• Voltage - Supply: 1.1 V ~ 3.465 V
• Operating Temperature: -40°C ~ 100°C
• Number Of I /o: 108
• Number Of Logic Elements/cells: *
• Number Of Gates: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Interconnect
Interconnect is the programmable network of signal path-
ways between the inputs and outputs of functional elements
within the FPGA, such as IOBs, CLBs, DCMs, block RAM,
etc.
Interconnect, also called routing, is segmented for optimal
connectivity. Functionally, interconnect resources are identi-
cal to that of the Spartan-3 architecture. There are four
kinds of interconnects: long lines, hex lines, double lines,
and direct lines. The Xilinx Place and Route (PAR) software
exploits the rich interconnect array to deliver optimal system
performance and the fastest compile times.
DS312-2 (v1.1) March 21, 2005
Advance Product Specification
R
Figure 45: Four Types of Interconnect Tiles (CLBs, IOBs, DCMs, and Block RAM/Multiplier)
Switch
Switch
Switch
Switch
Switch
Matrix
Matrix
Matrix
Matrix
Matrix
IOB
IOB
IOB
IOB
IOB
Switch
Switch
Switch
Matrix
Matrix
Matrix
Figure 46: Array of Interconnect Tiles in Spartan-3E FPGA
Switch
Switch
Switch
Switch
Switch
Matrix
Matrix
Matrix
Matrix
Matrix
DCM
CLB
IOB
CLB
CLB
CLB
CLB
IOB
www.xilinx.com
Switch
Switch
Switch
Switch
Switch
Matrix
Matrix
Matrix
Matrix
Matrix
Switch
Switch
Switch
Switch
Matrix
Matrix
Matrix
Matrix
The switch matrix connects to the different kinds of intercon-
nects across the device. An interconnect tile, shown in
Figure
a functional element, such as a CLB, IOB, or DCM. If a func-
tional element spans across multiple switch matrices such
as the block RAM or multipliers, then an interconnect tile is
defined by the number of switch matrices connected to that
functional element. A Spartan-3E device can be repre-
sented as an array of interconnect tiles where interconnect
resources are for the channel between any two adjacent
interconnect tile rows or columns as shown in
CLB
CLB
CLB
CLB
IOB
45, is defined as a single switch matrix connected to
18Kb
Block
RAM
Switch
Switch
Switch
Switch
Switch
Matrix
Matrix
Matrix
Matrix
Matrix
DS312_08_020905
18 x 18
MULT
CLB
CLB
CLB
CLB
IOB
Functional Description
Switch
Switch
Switch
Switch
Switch
Matrix
Matrix
Matrix
Matrix
Matrix
DS312_09_020905
Figure
46.
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