CS42528-DQZ Cirrus Logic Inc, CS42528-DQZ Datasheet - Page 56

• Manufacturer Part Number: CS42528-DQZ
• Description: IC CODEC S/PDIF RCVR 64-LQFP
• Manufacturer: Cirrus Logic Inc
• Type: Audio Codecr

Specifications of CS42528-DQZ

• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 8
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 114 / 114
• Voltage - Supply, Analog: 4.75 V ~ 5.25 V
• Voltage - Supply, Digital: 3.13 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Audio Codec Type: Stereo
• No. Of Adcs: 2
• No. Of Dacs: 8
• No. Of Input Channels: 2
• No. Of Output Channels: 8
• Adc / Dac Resolution: 24bit
• Adcs / Dacs Signal To Noise Ratio: 114dB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1503 - BOARD EVAL FOR CS42528/CS49300
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

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6.10
6.10.1 BURST PREAMBLE BITS (PCX & PDX)
6.11
6.11.1 SINGLE VOLUME CONTROL (SNGVOL)
6.11.2 SOFT RAMP AND ZERO CROSS CONTROL (SZCX)
Reserved
PCx-7
PDx-7
7
7
Burst Preamble PC and PD Bytes (addresses 09h - 0Ch)(Read Only)
Volume Transition Control (address 0Dh)
Immediate Change
Zero Cross
Default = xxh
Function:
Default = 0
Function:
Default = 00
00 - Immediate Change
01 - Zero Cross
10 - Soft Ramp
11 - Soft Ramp on Zero Crossings
Function:
The PC and PD burst preamble bytes are loaded into these four registers.
The individual channel volume levels are independently controlled by their respective Volume Control
registers when this function is disabled. When enabled, the volume on all channels is determined by
the A1 Channel Volume Control register and the other Volume Control registers are ignored.
When Immediate Change is selected, all level changes will take effect immediately in one step.
Zero Cross Enable dictates that signal-level changes, either by attenuation changes or muting, will
SNGVOL
PCx-6
PDx-6
6
6
RCVR_CLK2 RCVR_CLK1 RCVR_CLK0
0
0
0
0
1
1
1
1
PCx-5
PDx-5
SZC1
Table 14. Receiver Clock Frequency Detection
5
5
0
0
1
1
0
0
1
1
PCx-4
PDx-4
SZC0
4
4
0
1
0
1
0
1
0
1
AMUTE
PCx-3
PDx-3
3
3
MUTE SAI_SP
Description
11.2896 MHz
16.3840 MHz
22.5792 MHz
24.5760 MHz
45.1584 MHz
49.1520 MHz
8.1920 MHz
12.288 MHz
PCx-2
PDx-2
2
2
RAMP_UP
PCx-1
PDx-1
1
1
CS42528
RAMP_DN
PCx-0
PDx-0
DS586F1
0
0