XCCACE-TQG144I Xilinx Inc, XCCACE-TQG144I Datasheet - Page 18

• Manufacturer Part Number: XCCACE-TQG144I
• Description: IC ACE CONTROLLER CHIP TQ144
• Manufacturer: Xilinx Inc

Specifications of XCCACE-TQG144I

• Controller Type: ACE Controller
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 30mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 144-TQFP, 144-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Interface: -
• Other names: 122-1511-5

System ACE CompactFlash Solution
Data Buffer Write Cycle Ready Timing
When the data buffer is in write mode and the last available
space for a data word has been filled, the data buffer ready
signal will go inactive (MPBRDY = LOW) two clock cycles
following the last clock cycle that the write enable is active
18
CYCLE
CLK
MPA
MPD
MPCE
MPWE
MPOE
MPBRDY
Figure 14: Valid and Invalid Writes to DATABUFREG Data Buffer
60ns
Cycle 0
DATABUFREG ADDRESS
80ns
tSOE
tSCE
tSA
Cycle 1
100ns
VALID DATA
tSWE
tSD
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120ns
tH
tH
tH
Cycle 2
tSWE
(MPWE = LOW). Any attempt to write data to a “full” data
buffer (MPWE = LOW while MPBRDY = LOW) does not
result in a successful write to the buffer. Valid and invalid
data buffer writes are shown in
DATABUFREG ADDRESS
140ns
tSA
tBRDY
tH
INVALID DATA
Cycle 3
160ns
tSWE
tSD
180ns
tH
tH
tH
tH
tH
Cycle 4
tSWE
Figure
200ns
DS080 (v2.0) October 1, 2008
DS080_19_020101
Product Specification
14.
Cycle 5
tH
220
R