XCCACE-TQG144I Xilinx Inc, XCCACE-TQG144I Datasheet - Page 31

IC ACE CONTROLLER CHIP TQ144

XCCACE-TQG144I

Manufacturer Part Number
XCCACE-TQG144I
Description
IC ACE CONTROLLER CHIP TQ144
Manufacturer
Xilinx Inc
Datasheet

Specifications of XCCACE-TQG144I

Controller Type
ACE Controller
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
30mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Interface
-
Other names
122-1511-5

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CONTROLREG Register (BYTE address 18h-1Bh, WORD address 0Ch-0Dh)
The CONTROLREG register provides the means for the MPU interface to control System ACE CF controller functionality.
Table 17
Table 17: CONTROLREG Register Bit Descriptions
DS080 (v2.0) October 1, 2008
Product Specification
Bit
5
6
7
8
9
0
1
2
3
4
FORCELOCKREQ
LOCKREQ
FORCECFGADDR
FORCECFGMODE
CFGMODE
CFGSTART
CFGSEL
CFGRESET
DATABUFRDYIRQ
ERRORIRQ
provides a description of the CONTROLREG register bits.
R
Name
Forces the CompactFlash arbitration logic to grant a lock to the MPU interface based on
the value of the LOCKREQ bit of the CONTROLREG register (default is 0):
• 0 means do not force MPU lock request (i.e., arbitrate between Configuration
• 1 means force MPU lock request (i.e., do not perform arbitration: grant lock request
CF arbitration lock request signal; Once a lock is granted, the LOCKREQ must be
de-asserted before the lock is removed (default is 0):
• 0 means do not request CompactFlash access lock
• 1 means request CompactFlash access lock
Forces the overriding of the CFGADDR(1:0) pins in favor of using the CFGADDRBIT(2:0)
bits of the CONTROLREG(15:13) register (default is 0):
• 0 means use the CFGADDR(1:0) pins
• 1 means use the CONTROLREG(15:13) register bits
Forces the overriding of CFGMODEPIN in favor of using the CFGMODE bit of the
CONTROLREG register (default is 0):
• 0 means use CFGMODEPIN
• 1 means use the CFGMODE bit of the CONTROLREG register
Configuration mode (default is 0):
• 1 means automatically start the configuration process immediately after System ACE CF
• 0 means wait for CFGSTART bit in CONTROLREG before starting the configuration
Configuration start bit (default is 0):
• 0 means do not start configuration
• 1 means start configuration process
Configuration select (default is 0):
• 0 means configure from CompactFlash
• 1 means configure from MPU interface
Configuration/CompactFlash controller reset (default is 0):
• 0 means do not reset
• 1 means reset the Configuration and CompactFlash controllers (this also causes a
Data buffer ready IRQ enable (default is 0):
• 1 means interrupts are enabled for when data buffer is ready for transfer of data into or
• 0 means data buffer ready interrupts are disabled
Error IRQ enable (default is 0):
• 1 means interrupts are enabled for when an error occurs
• 0 means error interrupts are disabled
Controller and MPU interface)
based only on MPU requests)
controller Reset
process
“soft-reset” of the CompactFlash device)
out of the buffer
www.xilinx.com
Description
System ACE CompactFlash Solution
31

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