TSI148-133CL IDT, Integrated Device Technology Inc, TSI148-133CL Datasheet - Page 115

• Manufacturer Part Number: TSI148-133CL
• Description: IC PCI-VME BRIDGE 456PBGA
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: Tsi148&Trade;r

Specifications of TSI148-133CL

• Applications: PCI-to-VME Bridge
• Interface: PCI
• Voltage - Supply: 3.3V
• Package / Case: 456-PBGA
• Mounting Type: Surface Mount
• Package Type: BGA
• Rad Hardened: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 800-1906

4.5.6.4
4.5.7
4.5.8
Tsi148 PCI/X-to-VME Bus Bridge User Manual
80A3020_MA001_13
Detected Error Abort
If any of following system errors are encountered, the DMA controller aborts all DMA
activity:
•
•
•
•
•
This is considered a non-recoverable termination, and takes affect immediately after the
condition has been detected. Once all DMA activity has ceased, the DMA controller returns
the appropriate error status to the DSTA register and, if enabled, interrupts the processor.
DMA Interrupts
The DMA Controller sends an interrupt to the interrupt controller when it returns to the idle
state. If the DMA interrupt in the interrupt controller is enabled, an INTx signal line is
asserted to signal the interrupt.
Transfer Throttling
The Tsi148 has the ability to throttle DMA transfers. This features is for situations where the
VMEbus or PCI/X bus bandwidth that is consumed by the DMA Controller could swamp the
system with DMA activity. There are several methods available to control the bandwidth
consumed by the DMA controller. The PCI/X bus latency timer and the VMEbus time-on
timer can be used to control the VMEbus and PCI/X bus time allocated to the Tsi148. In
addition the DMA controller has a programmable block size and back-off timer.
The block size can be set from 32 to 4096 bytes. The back-off value can be set from 0 to
64 us. The block size and back-off time are independently programmable for each bus. The
DMA controller requests the selected block size and when that request is satisfied, it waits for
the time set by the back-off timer before requesting a new block.
PCI/X Master received a master abort
PCI/X Master received a target abort
PCI/X Master exceeds the maximum retry count
VME Master received a bus error
VME Master received slave termination
The DSTA register can be read at any time to obtain the operating status of the
controller.
Larger DMA block sizes are more efficient but increase latency. Smaller DMA
block sizes reduce latency but are less efficient.
4. DMA Interface > Direction of Data Movement
115