TSI148-133CL IDT, Integrated Device Technology Inc, TSI148-133CL Datasheet - Page 157

• Manufacturer Part Number: TSI148-133CL
• Description: IC PCI-VME BRIDGE 456PBGA
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: Tsi148&Trade;r

Specifications of TSI148-133CL

• Applications: PCI-to-VME Bridge
• Interface: PCI
• Voltage - Supply: 3.3V
• Package / Case: 456-PBGA
• Mounting Type: Surface Mount
• Package Type: BGA
• Rad Hardened: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 800-1906

8.4.2
Table 15: VMEbus Signal Descriptions
Tsi148 PCI/X-to-VME Bus Bridge User Manual
80A3020_MA001_13
Signal Group
Transfer
Data
VMEbus Signal Descriptions
The Tsi148 VME Interface is designed to be connected to the VMEbus through external
buffers. Refer to the American National Standard for VME64, American National Standard
for VME64 Extensions, and Source Synchronous Transfer (2eSST) Standard documents for a
complete description of the VMEbus.
VA[31:1]
Address
VD[31:0]
DATA
AM[5:0]
Address Modifier
Signal Name
Active
High
High
High
I/O
O
O
O
I
I
I
The VMEbus address signals are
monitored by the VME Slave.
During MBLT transfers, the
address lines are used to transfer
data.
The VMEbus address signals are
driven by Tsi148 when it is the
VME Master. During MBLT
transfers, the address lines are used
to transfer data.
The VMEbus data signals are used
to receive data from the VMEbus
during master read cycles and slave
write cycles. They are also used to
receive address information during
A64 cycles.
The VMEbus data signals are
driven by Tsi148 to transmit data
during master write cycles and
slave read cycles. They are also
used to transmit address
information during A64 cycles.
The VMEbus address modifier
signals are monitored by the VME
Slave.
The VMEbus address modifier
signals are driven by Tsi148 when
it is the VME Master.
Description
8. Signals and Pins > Detailed Signal Descriptions
These signals are connected to
the VMEbus through external
bidirectional buffers. Since
LWORD_ is also used to transfer
data, it should be included in the
same buffer group as the
VMEbus address signals.
These signals are connected to
the VMEbus through external
bidirectional buffers.
These signals are connected to
the VMEbus through an external
bidirectional buffer. WRITE_
and IACK_ should be included in
the same buffer.
Buffer Requirements
157