TSI148-133CL IDT, Integrated Device Technology Inc, TSI148-133CL Datasheet - Page 162

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TSI148-133CL

Manufacturer Part Number
TSI148-133CL
Description
IC PCI-VME BRIDGE 456PBGA
Manufacturer
IDT, Integrated Device Technology Inc
Series
Tsi148&Trade;r
Datasheets

Specifications of TSI148-133CL

Applications
PCI-to-VME Bridge
Interface
PCI
Voltage - Supply
3.3V
Package / Case
456-PBGA
Mounting Type
Surface Mount
Package Type
BGA
Rad Hardened
No
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
800-1906

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Part Number
Manufacturer
Quantity
Price
Part Number:
TSI148-133CL
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
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Manufacturer:
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Quantity:
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8. Signals and Pins > Detailed Signal Descriptions
Table 15: VMEbus Signal Descriptions
162
Signal Group
Utility
Utility
SRSTI_
System Reset
Input
SRSTO
System Reset
Output
SFAILI_
System Fail
Input
SFAILO
System Fail
Output
ACFAILI_
AC Fail
Input
SYSCLK
System Clock
Output
GA[4:0]_
Geographic
Address
Input
GAP_
Geographic
Address Parity
Input
Signal Name
Active
High
High
Low
Low
Low
Low
Low
I/O
O
O
O
I
I
I
I
I
The VMEbus system reset signal is
used to reset the VMEbus logic. It
causes the LRSTO_ signal to be
asserted which causes a local bus
reset.
The VMEbus system reset signal is
driven to reset the VMEbus.
The VMEbus system fail signal is
monitored by Tsi148’s interrupter
logic. If enabled, an interrupt is
generated on the falling edge of
SFAILI_.
The VMEbus system fail signal is
driven by Tsi148 when the
BDFAIL_ signal is asserted and the
SYSFAIL signal is not inhibited.
The VMEbus AC fail signal is
monitored by Tsi148’s interrupter
logic. If enabled, an interrupt is
generated on the falling edge of
ACFAILI_.
The system clock signal is driven
by Tsi148 when the system
controller function is enable.
These signals are connected to the
geographic address signals on the
VMEbus.
This signal is connected to the
geographic address parity signal on
the VMEbus.
Description
Tsi148 PCI/X-to-VME Bus Bridge User Manual
This signal is 5 volt tolerant and
may be connected directly to the
VMEbus.
This signal is connected to the
VMEbus through an external
inverting open collector buffer.
This signal is 5 volt tolerant and
may be connected directly to the
VMEbus.
This signal is connected to the
VMEbus through an external
inverting open collector buffer.
This signal is 5 volt tolerant and
may be connected directly to the
VMEbus.
This signal is connected to the
VMEbus through an external
tri-state buffer.
Since these signals are either
grounded or open on the
backplane, they can be connected
directly to Tsi148.
Since this signal is either
grounded or open on the
backplane, it can be connected
directly to Tsi148.
Buffer Requirements
80A3020_MA001_13

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