PXB4220E-V33 Infineon Technologies, PXB4220E-V33 Datasheet - Page 44

IC CHIPSET 8 E1/T1 LINE 256-BGA

PXB4220E-V33

Manufacturer Part Number
PXB4220E-V33
Description
IC CHIPSET 8 E1/T1 LINE 256-BGA
Manufacturer
Infineon Technologies
Datasheet

Specifications of PXB4220E-V33

Applications
*
Interface
*
Voltage - Supply
*
Package / Case
256-BGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
PXB4220E-V33
PXB4220E-V33IN

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PXB4220E-V33
Manufacturer:
Intel
Quantity:
10
Part Number:
PXB4220E-V33
Manufacturer:
Infineon Technologies
Quantity:
10 000
• If idle cell insertion according to ITU-T I.361 or ITU-T I.432.1 is desired, the
• If unassigned cell insertion at the NNI or uncontrolled UNI according to ITU-T I.361 is
The payload of idle or unassigned cells consists of the same octet which is repeated 48
times. It is programmable by the “prg_tx_pl” field of the “txid” register.
• For ITU-T I.432.1 compliant idle cells, the “prg_tx_pl” field of “txid” should be set to
• The pre-assigned values of the information field of all unassigned cells are for further
4.1.1.4
ITU-T I.432.3 [34] recommends the self-synchronizing scrambler x
scrambling at E1 datarates. For T1 no scrambling is recommended, which the IWE8
supports.
The scrambler function is implemented in the device. It can be disabled per port by the
x43_scrambling bit in the “ATM Transmit Reference Slot” in RAM2.
4.1.1.5
The HEC generation is implemented according to ITU-T I.432.1 [33] using the generator
polynomial x
the case of bit-slips it is recommended that
• the check bits are added (modulo 2) to an 8-bit pattern (coset) before being inserted
• the recommended pattern is “0101 0101".
Data Sheet
octet 1
octet 2
octet 3
octet 4
octet 5
octet 6
.
octet 53
“prg_tx_hd” field of “txid” should be set to 0000_0001
desired, the “prg_tx_hd” field of “txid” should be set to 0000 XXX0. For X any value is
allowed.
0110_1010
study (ITU-T I.361 [30])
in the last octet of the header.
Cell Payload Scrambling
HEC Generation
GFC[3:0]/VPI[11:8] = prg_tx_hd[7:4]
8
B
+ x
.
2
+ x + 1. To significantly improve the cell delineation performance in
VCI[3:0] = 0000
VPI[3:0] = 0000
VCI[11:4] = 0000_0000
B
B
prg_tx_pl[7:0]
prg_tx_pl[7:0]
44
PXB 4219E, PXB 4220E, PXB 4221E
UDF
.
PTI[2:0] = prg_tx_hd[3:1]
B
.
VCI[15:12] = 0000
VPI[7:4] = 0000
B
Operational Description
43
+1 for payload
IWE8, V3.4
B
B
2003-01-20
prg_tx_
CLP =
hd[0]

Related parts for PXB4220E-V33