PXB4220E-V33 Infineon Technologies, PXB4220E-V33 Datasheet - Page 98

• Manufacturer Part Number: PXB4220E-V33
• Description: IC CHIPSET 8 E1/T1 LINE 256-BGA
• Manufacturer: Infineon Technologies

Specifications of PXB4220E-V33

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 256-BGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: PXB4220E-V33; PXB4220E-V33IN

5.1.2.2
FRCLK[7:0]
FRDAT[7:0]
FRMFB[7:0]
FRFRS[7:0]
FRLOS[7:0]
FTCKO[7:0]
FTDAT[7:0]
FTMFS[7:0]
Data Sheet
E1 Mode
Framer Receive Clock
Receive clock input with 2.048 MHz
Framer Receive Data
depending on bit “frri” in “opmo”
0 =
1 =
Framer Receive Multiframe Begin
Depending on bits p_ces in pcfN:
depending on bit “rfpp” in “opmo”:
FRMFB is always sampled with the falling edge of FRCLK.
Framer Receive Frame Synchronization Pulse
Permanently inactive
Framer Receive Loss of Signalling
Framer Transmit Clock
depending on bits ftckn in ftcs:
00 =
01 =
10 =
11 =
Framer Transmit Data
depending on bit “ftri” in “opmo”:
0 =
1 =
Framer Transmit Multiframe Synchronization
0 =
1 =
0 =
1 =
FRDAT is sampled with the falling edge of FRCLK
FRDAT is sampled with the rising edge of FRCLK
Structured CES: A pulse on this pin designates the
first frame of a new multiframe
Unstructured CES: Unused, no constant level
allowed
FRMFB is active low
FRMFB is active high
depending on bit “rts_eval” in “opmo”:
0 = Transmit clock input with 2.048 MHz
1 = Clock of ICRC is used as transmit clock and is
also switched to FTCKO pins (FTCKO is output
pin)
FRCLK
Clock derived from RFCLK
No clock
FTDAT is clocked with the falling edge of FTCKO
FTDAT is clocked with the rising edge of FTCKO
98
PXB 4219E, PXB 4220E, PXB 4221E
Interface Description
IWE8, V3.4
2003-01-20