M69030 Asiliant Technologies, M69030 Datasheet - Page 128

• Manufacturer Part Number: M69030
• Manufacturer: Asiliant Technologies

Specifications of M69030

• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Operating Temperature (max): 70C
• Rad Hardened: No
• Lead Free Status / Rohs Status: Supplier Unconfirmed

9-26
CR15
read/write at I/O address 3B5h/3D5h with index at address 3B4h/3D4h set to 15h
shadowed for pipelines A and B
7-0
CR16
read/write at I/O address 3B5h/3D5h with index at address 3B4h/3D4h set to 16h
shadowed for pipelines A and B
7-0
`efmp
A
B
A
B

Vertical Blanking Start Bits 7-0
Vertical Blanking End Bits 7-0
69030 Databook
7
7
Vertical Blanking Start Register
Vertical Blanking End Register
This register provides the 8 least significant bits of either a 10-bit or 12-bit value that
specifies the beginning of the vertical blanking period relative to the beginning of the active
display area of the screen. Whether this value is described in 10 or 12 bits depends on the
setting of bit 0 of the I/O Control Register (XR09).
In standard VGA modes, where bit 0 of the I/O Control Register (XR09) is set to 0, the
vertical blanking start is specified with a 10-bit value. The most and second-most
significant bits of this value are supplied by bit 5 of the Maximum Scanline Register (CR09)
and bit 3 of the Overflow Register (CR07), respectively.
In extended modes, where bit 0 of the I/O Control Register (XR09) is set to 1, the vertical
blanking start is specified with a 12-bit value. The 4 most significant bits of this value are
supplied by bits 3-0 of the Extended Vertical Blanking Start Register (CR33).
This 10-bit or 12-bit value should be programmed to be equal to the number of scanlines
from the beginning of the active display area to the beginning of the vertical blanking period.
Since the active display area always starts on the 0th scanline, this number should be equal
to the number of the scanline on which vertical blanking begins, minus one.
This register provides a 8-bit value that specifies the end of the vertical blanking period
relative to its beginning.
This 8-bit value should be set equal to the least significant 8 bits of the result of adding the
length of the vertical blanking period in terms of the number of scanlines that occur within
the length of the vertical blanking period to the value that specifies the beginning of the
vertical blanking period (see the description of the Vertical Blanking Start Register for
details).
6
6
5
5
CRT Controller Registers
Vertical Blanking Start Bits 7-0
Vertical Blanking Start Bits 7-0
Vertical Blanking End Bits 7-0
Vertical Blanking End Bits 7-0
4
4
3
3
2
2
Revision 1.3 11/24/99
1
1
0
0