M69030 Asiliant Technologies, M69030 Datasheet - Page 135

• Manufacturer Part Number: M69030
• Manufacturer: Asiliant Technologies

Specifications of M69030

• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Operating Temperature (max): 70C
• Rad Hardened: No
• Lead Free Status / Rohs Status: Supplier Unconfirmed

CR32
read/write at I/O address 3B5h/3D5h with index at address 3B4h/3D4h set to 32h
shadowed for pipelines A and B
7-4
3-0
`efmp
A
B

Reserved
Vertical Sync Start Bits 11-8
69030 Databook
7
Extended Vertical Sync Start Register
These bits should always be written with the value of 0.
The vertical sync start is a 10-bit or 12-bit value that specifies the beginning of the vertical
sync pulse relative to the beginning of the active display area.
In standard VGA modes, where bit 0 of the I/O Control Register (XR09) is set to 0, the
vertical sync start is specified with a 10-bit value. The 8 least significant bits of the vertical
sync start are supplied by bits 7-0 of the Vertical Sync Start Register (CR10), and the 2
most significant bits are supplied by bits 7 and 2 of the Overflow Register (CR07). In
standard VGA modes, bits 3-0 of CR32 are not used.
In extended modes, where bit 0 of the I/O Control Register (XR09) is set to 1, the vertical
display end is specified with a 12-bit value. The 8 least significant bits of the vertical sync
start are supplied by bits 7-0 of the Vertical Sync Start Register (CR10), and the 4 most
significant bits are supplied by bits 3-0 of this register (CR32).
This 10-bit or 12-bit value should be programmed to be equal to the number of scanlines
from the beginning of the active display area to the start of the vertical sync pulse. Since
the active display area always starts on the 0th scanline, this number should be equal to
the number of the scanline on which the vertical sync pulse begins.
6
Reserved
Reserved
5
CRT Controller Registers
4
3
Vertical Sync Start Bits 11-8
Vertical Sync Start Bits 11-8
2
Revision 1.3 11/24/99
1
0
9-33