M69030 Asiliant Technologies, M69030 Datasheet - Page 136

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M69030

Manufacturer Part Number
M69030
Description
Manufacturer
Asiliant Technologies
Datasheet

Specifications of M69030

Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Operating Temperature (max)
70C
Rad Hardened
No
Lead Free Status / Rohs Status
Supplier Unconfirmed

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9-34
CR33
read/write at I/O address 3B5h/3D5h with index at address 3B4h/3D4h set to 33h
shadowed for pipelines A and B
7-4
3-0
`efmp
A
B
Reserved
Vertical Blanking Start Bits 11-8
69030 Databook
7
Extended Vertical Blanking Start Register
These bits should always be written with the value of 0.
The vertical blanking start is a 10-bit or 12-bit value that specifies the beginning of the
vertical blanking period relative to the beginning of the active display area.
In standard VGA modes, where bit 0 of the I/O Control Register (XR09) is set to 0, the
vertical blanking start is specified with a 10-bit value. The 8 least significant bits of the
vertical blanking start are supplied by bits 7-0 of the Vertical Blanking Start Register
(CR15), and the most and second-most significant bits are supplied by bit 5 of the
Maximum Scanline Register (CR09) and bit 3 of the Overflow Register (CR07),
respectively. In standard VGA modes, bits 3-0 if this register (CR33) are not used.
In extended modes, where bit 0 of the I/O Control Register (XR09) is set to 1, the vertical
blanking start is specified with a 12-bit value. The 8 least significant bits of this value are
supplied by bits 7-0 of the Vertical Blanking Start Register (CR15), and the 4 most
significant bits are supplied by bits 3-0 of this register (CR33).
This 10-bit or 12-bit value should be programmed to be equal to the number of scan lines
from the beginning of the active display area to the beginning of the blanking period. Since
the active display area always starts on the 0th scanline, this number should be equal to
the number of the scanline on which the vertical blanking period begins.
6
Reserved
Reserved
5
CRT Controller Registers
4
3
Vertical Blanking Start Bits 11-8
Vertical Blanking Start Bits 11-8
2
Revision 1.3 11/24/99
1
0

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