M69030 Asiliant Technologies, M69030 Datasheet - Page 304
M69030
Manufacturer Part Number
M69030
Description
Manufacturer
Asiliant Technologies
Datasheet
1.M69030.pdf
(387 pages)
Specifications of M69030
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Operating Temperature (max)
70C
Rad Hardened
No
Lead Free Status / Rohs Status
Supplier Unconfirmed
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M69030
Manufacturer:
CHIPS
Quantity:
20 000
Part Number:
M69030P
Manufacturer:
MIT
Quantity:
20 000
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16-22
MR28/A8
read/write at I/O address 3D3h with index at address 3D2h set to 28h/A8h
shadowed for each playback engine at MR28, and cross-shared for the other at MRA8
7-0
`efmp
PB
PB
1
2
Playback Line Memory Fetch Width Bits 7-0
69030 Databook
7
These 8 bits specify the number of quadwords read by the playback engine from the frame
buffer to display a horizontal line’s worth of video data. Normally, this value is set equal to
the actual number of quadwords required to store a horizontal line’s worth of video data
captured from the video data port -- i.e., normally this value is the same as that of register
MR0C.
If bit 6 of the Playback Control 3 Register (MR0C) is set to 0 then this register also specifies
the number of quadwords out of a horizontal line’s worth of video data that is actually played
back, starting at the left-most edge of the video playback window.
This value is calculated as follows:
Playback Line Memory Fetch Width Register
6
( (width of line in pixels) / (number of pixels per quadwords) ) - 1.
Playback Engine 1 Line Memory Fetch Width Bits 7-0
Playback Engine 1 Line Memory Fetch Width Bits 7-0
5
Multimedia Registers
4
3
2
Revision 1.3 11/24/99
1
0
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