M69030 Asiliant Technologies, M69030 Datasheet - Page 186
M69030
Manufacturer Part Number
M69030
Description
Manufacturer
Asiliant Technologies
Datasheet
1.M69030.pdf
(387 pages)
Specifications of M69030
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Operating Temperature (max)
70C
Rad Hardened
No
Lead Free Status / Rohs Status
Supplier Unconfirmed
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14-6
XR05
read-only at I/O address 3D7h with index at I/O address 3D6h set to 05h
shared by both pipelines A and B
7
6-0
XR06
read-only at I/O address 3D7h with index at I/O address 3D6h set to 06h
shared by both pipelines A and B
7-0
`efmp
A
&
B
A
&
B
Mem Space
Base Bit 23
Memory Space Base Address Bit 23
Reserved
Memory Space Base Address Bits 31-24
69030 Databook
(0)
7
7
Linear Base Address Low Register
Linear Base Address High Register
This bit is provided only for backward compatibility only. It is a hold-over from earlier CHIPS
graphics controllers.
The graphics controller requires a 16MB memory space on the host bus through which the
linear frame buffer and memory-mapped registers are accessed. This 16MB memory
space always begins on a 16MB address boundary, so bit 23 of the linear base address of
this 16MB memory space always has the value of 0. Therefore this bit always returns the
value of 0 when read. This base address is set through the MBASE register at offset 10h
in the PCI configuration space.
These bits always return the value of 0 when read.
The graphics controller requires a 16MB memory space on the host bus through which the
linear frame buffer and memory-mapped registers are accessed. These 8 bits provide
read-only access to bits 31-24, the 8 most significant bits of the linear base address at
which the 16MB memory space begins. This base address is set through the MBASE
register at offset 10h in the PCI configuration space.
6
6
5
5
Memory Space Base Address Bits 31-24
Extension Registers
4
4
(xxxx:xxxx)
(000:0000)
Reserved
3
3
2
2
Revision 1.3 11/24/99
1
1
0
0
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