XCB56362PV100 Freescale Semiconductor, XCB56362PV100 Datasheet - Page 34

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XCB56362PV100

Manufacturer Part Number
XCB56362PV100
Description
DSP Floating-Point 24-Bit 100MHz 100MIPS 144-Pin LQFP
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of XCB56362PV100

Package
144LQFP
Numeric And Arithmetic Format
Floating-Point
Maximum Speed
100 MHz
Ram Size
33 KB
Device Million Instructions Per Second
100 MIPS

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XCB56362PV100
Manufacturer:
XILINX
0
Part Number:
XCB56362PV100
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
No
Reset, Stop, Mode Select, and Interrupt Timing
19 Delay from address output valid caused by first interrupt
20 Delay from RD assertion to interrupt request
21 Delay from WR assertion to interrupt request
22 Synchronous interrupt setup time from IRQA, IRQB,
23 Synchronous interrupt delay time from the CLKOUT
24 Duration for IRQA assertion to recover from Stop state
25 Delay from IRQA assertion to fetch of first instruction
26 Duration of level sensitive IRQA assertion to ensure
3-8
instruction execute to interrupt request deassertion for
level sensitive fast interrupts
deassertion for level sensitive fast interrupts
deassertion for level sensitive fast interrupts
IRQC, IRQD, NMI assertion to the CLKOUT Transition 2
Transition 2 to the first external address output valid
caused by the first instruction fetch after coming out of
Wait Processing state
(when exiting Stop)
interrupt service (when exiting Stop)
• DRAM for all WS
• SRAM WS =1
• SRAM WS=2, 3
• SRAM WS ≥ 4
• Minimum
• Maximum
• PLL is not active during Stop (PCTL Bit 17 = 0) and
• PLL is not active during Stop (PCTL Bit 17 = 0) and
• PLL is active during Stop (PCTL Bit 17 = 1) (Implies
• PLL is not active during Stop (PCTL Bit 17 = 0) and
• PLL is not active during Stop (PCTL Bit 17 = 0) and
• PLL is active during Stop (PCTL Bit 17 = 1) (implies
Table 3-7 Reset, Stop, Mode Select, and Interrupt Timing 100 and 120 MHz Values
Stop delay is enabled (OMR Bit 6 = 0)
Stop delay is not enabled (OMR Bit 6 = 1)
No Stop Delay)
Stop delay is enabled (OMR Bit 6 = 0)
Stop delay is not enabled (OMR Bit 6 = 1)
no Stop delay)
Characteristics
9, 3
6
9, 3
DSP56362 Technical Data, Rev. 4
6
6 8
(128 K − PLC/2) × T
(128K − PLC/2) × T
PLC × ET
PLC × ET
PLC × ET
PLC × ET
(3.75 + WS) × T
(3.25 + WS) × T
(WS + 3.5) × T
(WS + 3.5) × T
(23.75 ± 0.5) × T
24.75 × T
(8.25 ± 0.5) × T
(20.5 ± 0.5) × T
1.75 × T
2.75 × T
9.25 × T
0.6 × T
0.6 × T
Expression
5.5 × T
10.94
10.94
10.94
10.94
C
C
C
C
C
C
C
C
C
C
× PDF +
× PDF +
× PDF +
× PDF +
– 0.1
− 0.1
+ 1.0
– 4.0
– 4.0
C
+ 5.0
2
C
C
C
C
C
C
C
C
C
232.5 ns
93.5
77.5
13.6
12.3
55.0
Min
5.9
1.3
5.9
100 MHz
12.3 ms
Note 7
Note 7
Note 7
Note 7
Note 7
Note
252.5
Max
13.6
87.5
Freescale Semiconductor
7
1
(continued)
78.1
64.6
45.8
Min
4.9
4.9
120 MHz
Note 7
Note 7
Note 7
Note 7
Note 7
Note 7
211.2
Max
72.9
Unit
ms
ms
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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