PEB20256E-V21 Infineon Technologies, PEB20256E-V21 Datasheet - Page 42

IC CONTROLLER INTERFACE 388-BGA

PEB20256E-V21

Manufacturer Part Number
PEB20256E-V21
Description
IC CONTROLLER INTERFACE 388-BGA
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEB20256E-V21

Function
Multichannel Network Interface Controller (MUNICH)
Interface
HDLC, PPP, Serial, TMA
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
200mA
Power (watts)
3W
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
388-BBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Circuits
-
Other names
PEB20256E-V21
PEB20256E-V21IN

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PEB20256E-V21
Manufacturer:
MAX
Quantity:
63
Part Number:
PEB20256E-V21
Manufacturer:
Infineon Technologies
Quantity:
10 000
Data Sheet
Pin No.
C12
K1, K3, K4, J2,
H1, J4, H2, H3,
D2, E3, C4, B4,
A4, D5, C5, B5,
B8, A8, D9, C9,
B9, C10, A10,
D11, B14, C14,
D14, A16
R23, V25, U26,
R24, T25, P24,
T26, P25, P26,
N25, N23, L26,
K26, M23, L25,
H26, L23, D20,
B22, A23, C20,
D19, B21, C19,
A21, C16, B16,
D15
N2, M4, L1, L4,
H4, G3, G4,
D1, D6, A6, C7,
D8, A13, D13,
D16, A19, B18,
B19, C26, G23,
G24, H24, F26,
K24, T24, T23,
W25, C11
Symbol
TTD
TCLK(27:0)
TD(27:0)
RCLK(27:0)
Output (O)
Input (I)
O
I
I
I
42
Function
Test Transmit Data
In serial test mode the data stream
provided via TTD replaces the transmit
data stream of the selected transmit line.
Transmit Clock
This signal provides the data clock for TD.
In framed modes (T1/E1) a clock gap
indicates the frame boundary.
T1/DS1
CEPT
Unchannelized:
Up to 45 MHz on port zero or up to 8.192
MHz on every other port.
Transmit Data
Serial data sent by this output port is
push-pull for active bits in the PCM frame
and tri-state for inactive bits. Output is tri-
state
transmission. Transmit data is updated on
the rising or falling edge of the selected
transmit clock.
Receive Clock
This signal provides the data clock for RD.
In framed modes (T1/E1) a clock gap
indicates the frame boundary.
T1/DS1
CEPT
Unchannelized:
Up to 45 MHz on port zero or 8.192 MHz
on every other port.
until
24-channel
32-channel
24-channel
32-channel
port
is
1.544 MHz
2.048 MHz
1.544 MHz
2.048 MHz
Pin Description
PEB 20256 E
PEF 20256 E
enabled
04.2001
for

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